Trying to use v5.xxx: what GCC compiler and what timing settings?

[shareefj]

I'm trying to port our project to use v5.012 but have hit a few compilation errors that I'm not sure how to solve. I also failed to find any documentation about the new timing options but perhaps I missed it - can you point me at any?

We have some #delays in our code which seem to require the use of the --no-timing switch to work around. However, when I compile our model I then see the following error:

In file included from Vchip_sim_tb__Syms.h:26,
                 from Vchip_sim_tb___024root__DepSet_h2f158d1d__0.cpp:8:
Vchip_sim_tb_std__03a__03aprocess__Vclpkg.h:28:27: error: 'VlProcessRef' has not been declared
   28 |     void __VnoInFunc_self(VlProcessRef vlProcess, Vchip_sim_tb__Syms* __restrict vlSymsp, VlClassRef<Vchip_sim_tb_std__03a__03aprocess> &self__Vfuncrtn);
      |                           ^~~~~~~~~~~~
make[1]: *** [/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated.mk:245: Vchip_sim_tb___024root__DepSet_h2f158d1d__0.o] Error 1
make[1]: *** Waiting for unfinished jobs....

If I add the include file verilated_timing.h I then get issues about #include <coroutine>. I'm using GCC v9.3.0p6 as we're on Centos in a managed HPC chamber.

[shareefj]

So moving to a compiler that supports -fcoroutines (GCC v12.3.0) I now get the following errors:

/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:128:10: error: 'coroutine_handle' in namespace 'std' does not name a template type
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:140:44: error: expected ')' before '<' token
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:142:9: error: expected unqualified-id before ',' token
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:143:9: error: expected unqualified-id before ',' token
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:143:32: error: expected unqualified-id before '{' token
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:164:5: error: 'operator=' function uses 'auto' type specifier without trailing return type
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:136:11: error: class 'VlCoroutineHandle' does not have any field named 'm_coro'
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:148:11: error: class 'VlCoroutineHandle' does not have any field named 'm_coro'
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:148:23: error: 'exchange' is not a member of 'std'; did you mean 'vlstd::exchange'?
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:148:38: error: 'class VlCoroutineHandle' has no member named 'm_coro'
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:155:25: error: 'm_coro' was not declared in this scope
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:165:9: error: 'm_coro' was not declared in this scope
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:165:23: error: 'exchange' is not a member of 'std'; did you mean 'vlstd::exchange'?
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:165:38: error: 'class VlCoroutineHandle' has no member named 'm_coro'
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:219:5: error: 'delay' function uses 'auto' type specifier without trailing return type
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:228:37: error: 'std::coroutine_handle' has not been declared
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:228:53: error: expected ',' or '...' before '<' token
/projects/common/tools/verilator/verilator-v5.012/share/verilator/include/verilated_timing.h:229:59: error: 'coro' was not declared in this scope

[shareefj]

Issue #4243 seems to suggest that C++20 is only required when using --timing. When using --no-timing should I be able to compile my design with an older compiler (edit: and avoid the error in the first post)?

The following is the offending include file generated by Verilator when using --no-timing:

// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design internal header
// See Vchip_sim_tb.h for the primary calling header

#ifndef VERILATED_VCHIP_SIM_TB_STD__03A__03APROCESS__VCLPKG_H_
#define VERILATED_VCHIP_SIM_TB_STD__03A__03APROCESS__VCLPKG_H_  // guard

#include "verilated.h"
#include "verilated_threads.h"
class Vchip_sim_tb_std__03a__03aprocess;


class Vchip_sim_tb__Syms;

class alignas(VL_CACHE_LINE_BYTES) Vchip_sim_tb_std__03a__03aprocess__Vclpkg final : public VerilatedModule {
  public:

    // INTERNAL VARIABLES
    Vchip_sim_tb__Syms* const vlSymsp;

    // CONSTRUCTORS
    Vchip_sim_tb_std__03a__03aprocess__Vclpkg(Vchip_sim_tb__Syms* symsp, const char* v__name);
    ~Vchip_sim_tb_std__03a__03aprocess__Vclpkg();
    VL_UNCOPYABLE(Vchip_sim_tb_std__03a__03aprocess__Vclpkg);

    // INTERNAL METHODS
    void __Vconfigure(bool first);
    void __VnoInFunc_self(VlProcessRef vlProcess, Vchip_sim_tb__Syms* __restrict vlSymsp, VlClassRef<Vchip_sim_tb_std__03a__03aprocess> &self__Vfuncrtn);
};


class Vchip_sim_tb__Syms;

class Vchip_sim_tb_std__03a__03aprocess : public VlClass {
  public:
    void __VnoInFunc_await(Vchip_sim_tb__Syms* __restrict vlSymsp);
    void __VnoInFunc_get_randstate(Vchip_sim_tb__Syms* __restrict vlSymsp, std::string &get_randstate__Vfuncrtn);
    void __VnoInFunc_kill(Vchip_sim_tb__Syms* __restrict vlSymsp);
    void __VnoInFunc_resume(Vchip_sim_tb__Syms* __restrict vlSymsp);
    void __VnoInFunc_set_randstate(Vchip_sim_tb__Syms* __restrict vlSymsp, std::string s);
    void __VnoInFunc_set_status(Vchip_sim_tb__Syms* __restrict vlSymsp, IData/*31:0*/ s);
    void __VnoInFunc_status(Vchip_sim_tb__Syms* __restrict vlSymsp, IData/*31:0*/ &status__Vfuncrtn);
    void __VnoInFunc_suspend(Vchip_sim_tb__Syms* __restrict vlSymsp);
  private:
    void _ctor_var_reset(Vchip_sim_tb__Syms* __restrict vlSymsp);
  public:
    Vchip_sim_tb_std__03a__03aprocess(Vchip_sim_tb__Syms* __restrict vlSymsp);
    std::string to_string() const;
    std::string to_string_middle() const;
    ~Vchip_sim_tb_std__03a__03aprocess();
};

std::string VL_TO_STRING(const VlClassRef<Vchip_sim_tb_std__03a__03aprocess>& obj);

#endif  // guard

[shareefj]

OK, now I'm stumped, after removing all #delays from our design so try and work around this until someone answers, I still get the same error: 'VlProcessRef' has not been declared error.

So where is that defined? I must be missing an new v5 include or something. The only place I've found it defined so far is in verilated_timing.h.

[kiryk]

I think I can see why this happens. Does your design use mailbox, semaphore or process class?

They belong to SystemVerilog stdlib and use timing, which is not supported for older standards of C++.
Limited use of mailbox and semaphore without timing should be legal though, so I'll try to fix it.

If you don't actually use any of these classes, you could try verilating with --no-std flag, in addition to --no-timing. This should stop Verilator from processing stdlib and the timing expressions used in it.

[shareefj]

We're using gRPC in our top level Verilator model and that uses the Abseil library for synchronisation which I think uses semaphore. But there's a whole load of other libraries that gRPC depends upon that I have no idea about. So I'd assume yes, we use all of those features.

And yes, adding --no-std does indeed allow the verilation to complete. 👍

However, I'm now seeing another issue which might be its own ticket. Has something changed in how Verilator treats edges at time 0? We're using -x-initial-edge and are now seeing an assertion fire which wasn't before. It seems to look for a posedge of reset_n and check a bus value. In fact, it looks like this should always have fired given we are using -x-initial-edge so I wonder if some fixes went in there that now cause the assert to fire.

[kiryk]

@shareefj, I think since #4321 and #4368 are merged, you can drop --no-std and your design should verilate on Verilator from the master branch.

[shareefj]

@kiryk Thanks for that. I've confirmed that with the patch I can drop the --no-std and it now at least verilates. However, v5 seems to kill all our sims in another way so I'll have to go and debug that some more and open new tickets. Thanks.