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219 Open 2,161 Closed
219 Open 2,161 Closed
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Issues list

always_comb does not warn about latch new
#3474 opened Jun 27, 2022 by pinkcatfly
Wrong expression evaluation results area: wrong runtime result status: assigned
#3470 opened Jun 16, 2022 by algrobman
@yTakatsukasa
16
Verilator exits with: Internal Error, Broken link in node->dtypep() status: ready
#3467 opened Jun 15, 2022 by supleed2
2
Support inout inside SystemVerilog interface effort: days status: ready type: feature-IEEE
#3466 opened Jun 13, 2022 by nickelpro
3
Add v5 upgrade application note area: documentation v5
#3462 opened Jun 4, 2022 by wsnyder
Parallelization of Verilator code area: performance status: discussion
#3458 opened May 31, 2022 by mglb
1
Move the thread pool into the context area: performance area: usability status: blocked
#3454 opened May 29, 2022 by gezalore
10
Reducing iteration count in t/t_merge_cond_blowup causes unrolling error area: usability status: discussion type: bug
#3451 opened May 27, 2022 by gezalore
Verilating t/t_merge_cond_blowup.pl with --vltmt takes too long. area: performance area: scheduling area: usability status: discussion
#3450 opened May 27, 2022 by gezalore
Unexpected assertion behaviour status: asked reporter
#3448 opened May 27, 2022 by tbialas-riverlane
2
typedef derived from type defined inside interface status: ready type: feature-IEEE
#3441 opened May 22, 2022 by solomatnikov
Remove V3Expand, use VlWide methods instead area: performance status: discussion
#3437 opened May 17, 2022 by gezalore
2
Support localparam integer array slicing status: ready type: feature-IEEE
#3433 opened May 17, 2022 by michael-platzer
2
Likely incorrect scheduling on v5 with DPI exports area: scheduling area: vpi/dpi/api area: wrong runtime result v5
#3429 opened May 16, 2022 by gezalore
@gezalore
Better alternative to vcddiff area: tests area: tracing status: discussion type: maintenance
#3428 opened May 16, 2022 by gezalore
3
Support callback handlers instead of verilated.cpp ifdefs area: vpi/dpi/api v5
#3423 opened May 15, 2022 by wsnyder
Clean up Ast representations of statements and expressions status: discussion type: maintenance
#3420 opened May 15, 2022 by gezalore
2
Encapsulate verilated models independent of each other and the process status: discussion v5
#3419 opened May 15, 2022 by gezalore
4
Publish versioned documentation area: documentation v5
#3418 opened May 15, 2022 by gezalore
SystemVerilog size (tick) operator with expressions
#3417 opened May 15, 2022 by Blutyek
For develop-v5, update wikipedia area: documentation v5
#3416 opened May 14, 2022 by wsnyder
Arm tarmac instruction trace causes Verilator build to hang status: asked reporter
#3415 opened May 14, 2022 by shareefj
8
Incorrect tristate enable logic status: asked reporter
#3399 opened Apr 27, 2022 by shareefj
8
Support module level property statements area: assertions status: ready type: feature-IEEE
#3397 opened Apr 25, 2022 by supleed2
4
Side effect function inside unsatisfied if condition get executed area: wrong runtime result status: ready
#3395 opened Apr 22, 2022 by weisrc
19
ProTip! Updated in the last three days: updated:>2022-06-28.