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Merge pull request #2472 from verilog-to-routing/fix_3d_arch
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Fix: Address warnings in Koios 3D architectures and add additional test
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vaughnbetz committed Jan 19, 2024
2 parents 69f9ebe + 1c659ce commit 4f08d52
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1 change: 1 addition & 0 deletions vtr_flow/arch/multi_die/README.md
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Expand Up @@ -6,6 +6,7 @@ This directory contains architecture files for 3D FPGAs. The architectures are d
- Contains architecture files based on the [k6FracN10LB_mem20K_complexDSP_customSB_22nm](../COFFE_22nm/k6FracN10LB_mem20K_complexDSP_customSB_22nm.clustered.xml) architecture, utilized in Koios benchmarks.
- Inside the architecture file, the fabric with multiple sizes based on the sector size is defined.
- Routing resource and switch delays in this architecture are configured for 7 nm technology. The inter-die connection delay is 73 ps.
- The empty blocks in the middle of the fabric at the base die, which have the chess pattern, represent the through-silicon via (TSV) holes used to deliver power and ground to the upper die.
- Detailed information on how these delays are obtained can be found in the paper "Into the Third Dimension: Architecture Exploration Tools for 3D Reconfigurable Acceleration Devices," presented at FPT '23.
- **Architectures:**
- `3d_full_OPIN_inter_die_k6FracN10LB_mem20k_complexDSP_customSB_7nm.xml`
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Expand Up @@ -221,16 +221,6 @@
</pinlocations>
</sub_tile>
</tile>
<tile name="tsv_hole" height="2" width="2" area="137668">
<sub_tile name="tsv_hole">
<equivalent_sites>
<site pb_type="tsv_hole"/>
</equivalent_sites>
<input name="in" num_pins="1"/>
<output name="out" num_pins="1"/>
<fc in_type="abs" in_val="0" out_type="abs" out_val="0"/>
</sub_tile>
</tile>
</tiles>
<!-- ODIN II specific config ends -->
<layout>
Expand All @@ -251,10 +241,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -290,10 +280,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -328,10 +318,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -366,10 +356,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -404,10 +394,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -442,10 +432,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
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<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -1552,12 +1542,6 @@
</pb_type>
<!-- Define fracturable memory end -->

<pb_type name="tsv_hole">
<input name="I" num_pins="1"/>
<output name="O" num_pins="1"/>
<interconnect/>
</pb_type>

</complexblocklist>

<switchblocklist>
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Expand Up @@ -212,16 +212,6 @@
</pinlocations>
</sub_tile>
</tile>
<tile name="tsv_hole" height="2" width="2" area="137668">
<sub_tile name="tsv_hole">
<equivalent_sites>
<site pb_type="tsv_hole"/>
</equivalent_sites>
<input name="in" num_pins="1"/>
<output name="out" num_pins="1"/>
<fc in_type="abs" in_val="0" out_type="abs" out_val="0"/>
</sub_tile>
</tile>
</tiles>
<!-- ODIN II specific config ends -->
<layout>
Expand All @@ -242,10 +232,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -280,10 +270,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -318,10 +308,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -356,10 +346,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -394,10 +384,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -432,10 +422,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -470,10 +460,10 @@
<col type="dsp_top" startx="31" starty="1" repeatx="41" priority="20"/>

<!-- PW -->
<col type="tsv_hole" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="8" starty="5" repeatx="13" incry="12" priority="103"/>

<!-- GND -->
<col type="tsv_hole" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>
<col type="EMPTY" startx="14" starty="11" repeatx="13" incry="12" priority="103"/>

</layer>
<layer die="1">
Expand Down Expand Up @@ -1533,13 +1523,6 @@
</mode>
</pb_type>
<!-- Define fracturable memory end -->

<pb_type name="tsv_hole">
<input name="I" num_pins="1"/>
<output name="O" num_pins="1"/>
<interconnect/>
</pb_type>

</complexblocklist>

<switchblocklist>
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@@ -0,0 +1,52 @@
#
############################################
# Configuration file for running experiments
##############################################

# Path to directory of circuits to use
circuits_dir=benchmarks/titan_blif/other_benchmarks/stratixiv

# Path to directory of SDC files
sdc_dir=benchmarks/titan_blif/other_benchmarks/stratixiv

# Path to directory of architectures to use
archs_dir=arch/multi_die/stratixiv_3d

# Add circuits to list to sweep
circuit_list_add=carpat_stratixiv_arch_timing.blif
circuit_list_add=CH_DFSIN_stratixiv_arch_timing.blif
circuit_list_add=CHERI_stratixiv_arch_timing.blif
circuit_list_add=EKF-SLAM_Jacobians_stratixiv_arch_timing.blif
circuit_list_add=fir_cascade_stratixiv_arch_timing.blif
circuit_list_add=jacobi_stratixiv_arch_timing.blif
circuit_list_add=JPEG_stratixiv_arch_timing.blif
circuit_list_add=leon2_stratixiv_arch_timing.blif
circuit_list_add=leon3mp_stratixiv_arch_timing.blif
circuit_list_add=MCML_stratixiv_arch_timing.blif
circuit_list_add=MMM_stratixiv_arch_timing.blif
circuit_list_add=radar20_stratixiv_arch_timing.blif
circuit_list_add=random_stratixiv_arch_timing.blif
circuit_list_add=Reed_Solomon_stratixiv_arch_timing.blif
circuit_list_add=smithwaterman_stratixiv_arch_timing.blif
circuit_list_add=stap_steering_stratixiv_arch_timing.blif
circuit_list_add=sudoku_check_stratixiv_arch_timing.blif
circuit_list_add=SURF_desc_stratixiv_arch_timing.blif
circuit_list_add=ucsb_152_tap_fir_stratixiv_arch_timing.blif
circuit_list_add=uoft_raytracer_stratixiv_arch_timing.blif
circuit_list_add=wb_conmax_stratixiv_arch_timing.blif
circuit_list_add=picosoc_stratixiv_arch_timing.blif
circuit_list_add=murax_stratixiv_arch_timing.blif

# Add architectures to list to sweep
arch_list_add=3d_full_OPIN_inter_die_stratixiv_arch.timing.xml

# Parse info and how to parse
parse_file=vpr_titan.txt

# How to parse QoR info
qor_parse_file=qor_vpr_titan.txt

# Pass requirements
pass_requirements_file=pass_requirements_vpr_titan.txt

script_params=-starting_stage vpr --route_chan_width 300 --max_router_iterations 400 --router_lookahead map --place_bounding_box_mode cube_bb

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