Primitive input pin permutability should be more general

[vaughnbetz]

Currently we assume LUT input pins are permutable, and (I believe) other primitives are not. We should make this data-driven through the arch file so users can specify which inputs are permutable.

Proposed Behaviour

Users should specify the logical equivalence between primitive inputs. LUTs usually have equivalent inputs, but when used as pre-processing units in front of adders they usually have less equivalence. E.g. in Altera-like architectures, the 6-LUTs are divided into multiple 4-LUTs feeding the adders, so really we have 4-LUT groups of equivalent pins. Also, in Quartus synthesis output (used by Titan designs), we always have lcell_comb instead of LUTs (it is a LUT + adder) and the equivalence is a function of whether it is a LUT or not; if the adder is used there is less equivalence.

Current Behaviour

We assume LUTs are completely permutable, and every other primitive does not have permutable inputs.

Possible Solution

Connect to the existing arch file support that says whether ports are logically equivalent or not. Remove the current LUT-based permutability (automatically used) and generate a warning if the LUT pins are not marked as logically equivalent. Also need to fix a bunch of architecture files -- maybe an update script?

Context

With the flat router, it would be useful to have this extra degree of control. Both the clusterer and router should be connected to the new functionality.

[vaughnbetz]

Comment from @rs-dhow
May be able to handle this by ensuring we have different modes for arithmetic, 5 vs. 6-LUT etc. and never declare more inputs than can be swapped on the LUT in that mode.

[vaughnbetz]

Decided this probably isn't needed.