| Discipline | Engineering |
|---|---|
| Lab | Digital Electronics |
| Experiment | 7. Design and Verify the 4-Bit Serial In - Parallel Out Shift Registers. |
This experiment is to analyse the circuit and truth table of 4-bit SIPO (serial input parallel output) shift register by using IC 7474 (D flip flop).
| Name of Developer | R.S. Anand |
|---|---|
| Institute | IIT Roorkee |
| Email id | anandfee@gmail.com |
| Department | Electrical Engineering |
| SrNo | Name | Faculty or Student | Department | Institute | Email id |
|---|---|---|---|---|---|
| 1 | R.S. Anand | Faculty | Electrical Engineering | IIT Roorkee, Roorkee | anandfee@gmail.com |
| 2 | Jasbir Singh | Research Fellow | Electrical Engineering | IIT Roorkee, Roorkee | jasbirjassy6@gmail.com |
| 3 | Rajeev Kumar | Research Fellow | Electrical Engineering | IIT Roorkee, Roorkee | rajeevkumar.rke@gmail.com |
| 4 | Priyanshi Agarwal | Research Fellow | Electrical Engineering | IIT Roorkee, Roorkee | priyanshi.a07@gmail.com |