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Lilygo T5-4.7 - Current leaking to 3v3 rail after epd_poweroff #136
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First off, this is not the place to debug lilygo board. Even though it's supported by the library, you should open an issue on lilygo page, not here. It doesn't make any sense for the board to draw double the current when the power to the display is off compared to when display is on. The pins can't even draw such current because to my knowledge ESP pins are limited to around 20mA max. Also, these are signal pins and there's no way the display would draw such excessive current through data lines. The Lilygo board is not particularly great, it's based off of old outdated epdiy design and it has issues with the display fading out when sleeping. |
As far i know ESP32 has Cumulative IO output current = 1200mA and max ~40mA per IO, that also depends on pin power domain. I have tracked down 3 pins, 3x40mA = 120mA.. I know lilygo is not great design but hardware have been made, software can be changed. #90 |
The easiest way to test this would be just to pull all the suspected pins low or set them as input after shutting down the display |
I made some changes in display_ops.c
Much better. Offcourse there is better way to implement code above. |
@kaweksl would you submit a pull request? P.S.: Without this change I see severe fading if |
@ashald
Before noticing increased current consumption i was also delaying for ~700ms before poweroff . Good to know that now i can avoid that delay. |
I just received my PPK2 and tested whether I can reproduce the above. I can, and the difference is dramatic. I've got Lilygo T5-4.7 setup to wake up, received data over BLE advertisement, refresh the screen, and go back to deep sleep. I added 3s delay between Here is the original profile. Please note gray box in the bottom right corder that sums up the selected area. And here is the same cycle with the above fix. Basically, ~4x difference. As @kaweksl said above
I'd love to see this incorporated into the library. To the best of my understanding, we're sure there is an issue, and we know that it's solvable. Now the question is if the solution is adequate or it may have unwanted side-effects? @mcer12 what could help us move this forward? Thanks! |
@ashald modifying the library for broken unofficial hardware isn’t the way. I would merely add a note on wiki about this since it’s such a simple fix. Btw instead of delay, light sleep may be better if you want lowest power consumption possible. Give it a try. |
In my opinion if it's just setting the data lines to input in epd_poweroff() it could be done with a precompiler define and a proper for...loop to set the lines only when CONFIG_EPD_BOARD_REVISION_LILYGO_T5_47 is defined. |
@mcer12 The issue isn't caused by "broken hardware". Phantom powering the display WILL affect all designs. Unless "official hardware" completely disconnects the ESP IO from the display when the display is powered off, and, looking at the schematic, it doesn't disconnect the IO. IO going to any device that can be powered down should be set low, or set to input, whenever the part they connect to is powered down. ALWAYS. I have seen this issue in other commercial hardware, where a chip is powered off but the IO going to the chip is allowed to power the chip. In that case sleep power was higher than expected and there was reliability issues. |
@errolt Except this doesn't happen on official board. |
Maybe the other displays send a "0" as the last byte in all transactions, and the display on the Lilygo doesn't? Dunno. But there isn't significant hardware differences between official and lilygo hardware, not that I can see. Please don't get me wrong, I'm not arguing. I'm just talking from past commercial experience. My previous employer had 1M devices in the field before I was tasked to find the reason for batteries lasting 3 years instead of 8 years, which they promised their users. So I know how this issue can slip in. And changing the last byte sent to the display can cause, or hide, this intermittent issue. |
@errolt no, it's not about the display or leakage current from GPIOs. I don't know what design you're looking at but lilygo schematic is very different from V5 or V6 and is based off of very early epdiy schematic. Not to mention some mistakes in the design like using 100nF capacitor at the output of -20V rail. And 100nF capacitors on the linear regulators as well, that won't result in good clean output and may be the reason for some glitches reported by users. The sole fact that adding a delay fixes it leads me to think it has nothing to do with GPIO leakage ;) Design I am talking about (if it's not the correct one, please share yours): Also please don't take this as agressive, I'm just trying to explain my point of view. |
Which delay solution are you referring to? The code fix changes the IO lines to INPUT on epd_poweroff(), restores it in epd_poweron(). The only reference I see to a delay was to prevent fading, which was caused by the phantom power issue in the first place. Phantom powering a device can result is many a wonderful, and hard to debug, issue... |
@mcer12 I think you misunderstood his/her post. Their first line in the the post says that they confirm the issue, and the fix. They added a 3s delay to make the issue more visible, so they can highlight it in the graph. Then they applied the fix mentioned above, and the issue went away... The delay did not fix the problem... |
@errolt you're right lol, I can't read it looks like. |
@mcer12 Don't worry, has happened to me too... ;-) |
@mcer12, yes, as @errolt mentioned - I just added a delay to make the issue more visible - and that's what screenshots demonstrate. Not that I don't trust @kaweksl who found the issue originally, but I wanted to make sure it's reproducible by other people so that we're confident it's not a one off. I understand your concern with regards to having special tweak for different boards, and their issues, and I would've just stoped there if not one thing that I don't understand.
including the Lastly - and here could be just my lack of knowledge to blame - I couldn't find a way to add those custom functions on my own. I'm using this library via ESPHome, which uses PlatformIO to add it as a dependency. It's based on C++ code, and I wasn't able to get access to If you're hesitant to add another |
I would suggest not to make this a never ending conversation and just make a nice and clean pull request with the updated code. I think the one that decides if something goes or not in this library is the maintainer.
If would be enough to put the pins low, in a for loop, declaring the IOs in an gpio_num_t array. |
@kaweksl do you feel like submitting a PR? If no, I can try to do that based on your work. |
I think isolating or setting the outputs to low definitely seems like the correct solution here. Set the pins to output on poweron() and to input on poweroff(). Though I'm not sure if the I2S peripheral stays initialized when changing the pin direction, or if that would require to re-initialize the complete peripheral. |
I have tested that and gpio's have to be set back to output with proper matrix setting and i2s don't have to be re-initialized. I may create some PR but i have to find proper place to put that code. |
@kaweksl don't we want to put it into void epd_poweron() {
#if defined(CONFIG_EPD_BOARD_REVISION_LILYGO_T5_47)
// extra code here
#endif
cfg_poweron(&config_reg);
}
void epd_poweroff() {
cfg_poweroff(&config_reg);
#if defined(CONFIG_EPD_BOARD_REVISION_LILYGO_T5_47)
// extra code here
#endif
} ? |
Without any desire to criticize just giving my honest opinion @ashald : this looks really ugly. If doing this does not affect any other boards performance it should be done for all, just need to be tested properly when the PR is made. |
@martinberlin pardon me if I'm missing anything, but to me it looks like a common pattern across most of the codebase, including Is the intention to move away from that pattern start with this PR?.. Or am I missing something? And if we want to to test it with other boards - could you suggest anyone who can help with this? Or if this becomes such a big controversy, would you just prefer adding a function that returns |
Please disregard my above comment. I realized that one can just manipulate pins in their code and then just call original |
From what I gathered, the issue is twofold for the LILYGO board, but still present for the epdiy boards: |
Thanks for your followup. Tomorrow I will take some time to measure in my Lilygo board the battery consumption after epd_poweroff() and:
gpio_num_t DATA_BUS[] = {D6, D7, D4, D5, D2, D3, D0, D1, STH, CKH};
for (uint8_t pin = 0; pin < 10; pin++) {
gpio_set_level(DATA_BUS[pin], 0);
// Or if that keeps consumption up, then direction. But need to configure again in epd_poweron()
// gpio_set_direction(DATA_BUS[pin], GPIO_MODE_INPUT);
} Will report my findings here after taking the time to put the miliamperimeter in Serie with the battery and see how much it consumes. But I can confirm that in comparison to V6 this board it consumes much more. Lilygo designs are beautiful but they never cared much about keeping the lowest possible consumption levels on deepsleep. |
@martinberlin I have PPK2 wired with a JST connector so I can easily check things on my Likygo in terms of power consumption. If that is helpful, I can quickly run some tests if you'd share exact code you want to try. |
As is the code now, after power out in the dragon example, without any deepsleep this is what I see in the testing. As is without modifying anything: Using deepsleep after rendering the dragon Will leave later a proposed update but it needs to be tested in other boards. Important to mention my Lilygo EPD47 has touch connected, no idea if I2C touch leaks somewhere, but it might be lower that consumption in deepsleep without touch. |
This fix was merged so we can close here |
Hi,
On Lilygo T5-4.7 powered with battery after screen init and epd_poweron() board takes ~115mA@3.6V , and after epd_poweroff() but with ESP32 fully running ( NOT in deep sleep ) power consumption increases to ~235mA .
Looks like some control pins on ESP32 are staying high after epd_poweroff(); and some current passes from esp32 via epd chip clamping diodes to switched off 3v3 rail . This is not happening before epd initialization .
I have noticed after epd_poweroff() esp32 pins IO26 (STH) , IO5(CKH) and IO2(EP_D4) have ~2.2V what may indicate high current draw and drive overload .
Current draw measured with PPK2
EDIT: I need to clarify Lilygo T5-4.7 have rail called VDD3V3 that is powering ESP32 and shift register , it also have 3V3 rail that provide power to epd and LT1945, that rail is controlled by shift register and epd_poweron/poweroff . My theory is that when epd is off, current from esp32 pins go through clamping diodes of epd chip to not powered 3v3 rail and from there wants to power up LT1945 .
This doesn't happen if powered by USB because then EPD and LT1945 is always powered on .
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