catch-up after a two years hiatus

- drop Travis support (now defunct)
- generic_cpp.mk: use -std=c++17 (requires gcc 7.3 or later)
- RlinkPortCuff : drop libusb_set_debug (now deprecated)
- viv_tools_config.tcl: use open_hw_manager
- vbomconv: ghdl_m: use -Wl,--no-pie (for UB 18.04 gcc)
- simlib.vhd: write{oct,hex}: fix for ghdl V0.36 -Whide warnings

.gitignore

@@ -12,6 +12,7 @@
 *.dep_*
 
 # temporary and generated
+*.md.html
 *.o
 *.tmp
 *.log

doc/CHANGELOG.md

@@ -25,6 +25,9 @@ software or firmware builds or that the documentation is consistent.
 The full set of tests is only run for tagged releases.
 
 ### Summary
+- drop Travis (now defunct)
+- use vivado 2020.1 as default
+- use std=c++17 (requires gcc 7.3 or later)
 - automate oskit download and container file setup
 - automate testing of oskits
 - get Nexys A7 board working and fully integrated,
@@ -37,6 +40,10 @@ The full set of tests is only run for tagged releases.
   - ostest: automation of oskit tests
 
 ### Changes
+- tools changes
+  - RlinkPortCuff,/RtclRusb: drop libusb_set_debug (now deprecated)
+  - viv_tools_config.tcl: use open_hw_manager
+  - vbomconv: ghdl_m: use -Wl,--no-pie (for UB 18.04 gcc)
 - firmware changes
   - nexys4d/mig_a.prj: InputClk 100 MHz
   - tst_mig/nexys4d/sys_tst_mig_n4d: use 100 MHz MIG SYS_CLK; add clock monitor
@@ -479,7 +486,7 @@ The full set of tests is only run for tagged releases.
 - get vivado 2017.1 ready
 - Added Unix 7th Edition oskit; rename 5th Edition kit
   - u5ed_rk: renamed from unix-v5_rk
-  - u7ed_rp: added, very preliminary, boots on CmodA7, further testing needed
+  - u7ed_rp: added, very preliminary, boots on Cmod A7, further testing needed
 
 ### New features
 - Add Digilent Cmod A7 (35 die size) support
@@ -491,7 +498,7 @@ The full set of tests is only run for tagged releases.
   - associated changes
     - sn_humanio_rbus: add stat_rbf_emu (=0); single cycle btn pulses
     - rgbdrv_analog(_rbus): add ACTLOW generic to invert output polarity
-    - ti_rri: adopt Digilent autodetect for CmodA7
+    - ti_rri: adopt Digilent autodetect for Cmod A7
   - add systems
     - tst_rlink: rlink tester
     - tst_sram: SRAM tester

doc/INSTALL_fx2_support.md

@@ -71,8 +71,8 @@ In case sdcc 2.x is installed use
 
     make SDCC29=1
 
-instead. See also tools/fx2/src/README.txt.
+instead. See also [tools/fx2/src/README.md](../tools/fx2/src/README.md).
 
-Please read [README_USB_VID-PID.md](README_USB_VID-PID.md) carefully to 
+Please read [README_USB-VID-PID.md](README_USB-VID-PID.md) carefully to
 understand the usage of USB VID and PID.
 

doc/README_buildsystem_Vivado.md

@@ -260,7 +260,8 @@ Vivado hardware server. Simply use
 
     make <sys>.vconfig
 
-Note: works with Arty, Basys3, and Nexys4, only one board must connected.
+Note: works with Arty, Basys3, Cmod A7, and Nexys4,
+only one board must connected.
 
 ### <a id="ise">Note on ISE</a>
 

doc/w11a_os_guide.md

@@ -165,7 +165,7 @@ All examples below use the same basic setup
       - for Arty A7, Basys3, Cmod A7, Nexys4, and Nexys A7 board simply use `D`
       - otherwise check with `ls /dev/ttyUSB*` to see what is available
       - `<dn>` is typically '1' if a single `FT2232HQ` based board is connected,
-        like an Arty, Basys3, CmodA7, or Nexys4. Initially two ttyUSB devices
+        like an Arty, Basys3, Cmod A7, or Nexys4. Initially two ttyUSB devices
         show up, the lower is for FPGA configuration and will disappear when
         the Vivado hardware server is used once. The upper provides the data
         connection.

rtl/.gitignore

@@ -53,3 +53,6 @@ tmu_ofile
 *.tap
 *.lst
 *.cof
+
+# saved synthesis
+viv_20??.*

rtl/vlib/simlib/simlib.vhd

@@ -1,6 +1,6 @@
--- $Id: simlib.vhd 1181 2019-07-08 17:00:50Z mueller $
+-- $Id: simlib.vhd 1202 2019-08-13 17:23:16Z mueller $
 -- SPDX-License-Identifier: GPL-3.0-or-later
--- Copyright 2006-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
+-- Copyright 2006-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
 --
 ------------------------------------------------------------------------------
 -- Module Name:    simlib - sim
@@ -9,10 +9,11 @@
 -- Dependencies:   -
 -- Test bench:     -
 -- Target Devices: generic
--- Tool versions:  xst 8.2-14.7; viv 2015.4-2016.2; ghdl 0.18-0.33
+-- Tool versions:  xst 8.2-14.7; viv 2015.4-2016.2; ghdl 0.18-0.36
 --
 -- Revision History: 
 -- Date         Rev Version  Comment
+-- 2019-08-13  1202   2.1.5  write{oct,hex}: fix for ghdl V0.36 -Whide warnings
 -- 2016-09-03   805   2.1.4  simclk(v): CLK_STOP,CLK_HOLD now optional ports
 -- 2016-07-16   787   2.1.3  add simbididly component
 -- 2016-06-12   774   2.1.2  add writetimens()
@@ -1063,15 +1064,15 @@ begin
     nibble := "000";
     nibble(iwidth-1 downto 0) := value(ioffset+iwidth-1 downto ioffset);
     ochar := ' ';
-    for i in nibble'range loop
-      case nibble(i) is
+    for j in nibble'range loop
+      case nibble(j) is
         when 'U' => ochar := 'U';
         when 'X' => ochar := 'X';
         when 'Z' => ochar := 'Z';
         when '-' => ochar := '-';
         when others => null;
       end case;
-    end loop;  -- i
+    end loop;  -- j
     if ochar = ' ' then
       write(L,to_integer(unsigned(nibble)));
     else
@@ -1125,15 +1126,15 @@ begin
     nibble := "0000";
     nibble(iwidth-1 downto 0) := value(ioffset+iwidth-1 downto ioffset);
     ochar := ' ';
-    for i in nibble'range loop
-      case nibble(i) is
+    for j in nibble'range loop
+      case nibble(j) is
         when 'U' => ochar := 'U';
         when 'X' => ochar := 'X';
         when 'Z' => ochar := 'Z';
         when '-' => ochar := '-';
         when others => null;
       end case;
-    end loop;  -- i
+    end loop;  -- j
     if ochar = ' ' then
       write(L,hextab(to_integer(unsigned(nibble))+1));
     else

tools/bin/vbomconv

@@ -1,10 +1,11 @@
 #!/usr/bin/perl -w
-# $Id: vbomconv 1189 2019-07-13 16:41:07Z mueller $
+# $Id: vbomconv 1202 2019-08-13 17:23:16Z mueller $
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright 2007-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
 #
 #  Revision History:
 # Date         Rev Version  Comment
+# 2019-08-13  1202   1.18.2  ghdl_m: use -Wl,--no-pie (for UB 18.04 gcc)
 # 2019-07-13  1189   1.18.1  drop superfluous exists for $opts
 # 2018-11-09  1066   1.18   add and use bailout; add @tcl
 # 2016-08-28   804   1.17.3 xsim work dir now xsim.<mode>.<stem>
@@ -432,7 +433,8 @@ if ($opts{ghdl_m} || $opts{ghdl_m_cmd} ) {
 
   $cmd .= "ghdl -m --workdir=${workdir}";
   $cmd .= " -o $stem";
-                                 # -fexplicit needed for ISE 13.1,13.3
+  $cmd .= '  -Wl,-no-pie';   # needed when gcc built with --enable-default-pie
+                             # -fexplicit needed for ISE 13.1,13.3
   $cmd .= ' -fexplicit'          if $has_unisim or $has_unimacro or $has_simprim;
   $cmd .= " -P$xlpath/unisim"    if $has_unisim;
   $cmd .= " -P$xlpath/unimacro"  if $has_unimacro;

tools/fx2/.gitignore

@@ -0,0 +1 @@
+*.lst

tools/make/generic_cpp.mk

@@ -1,9 +1,10 @@
-# $Id: generic_cpp.mk 1168 2019-06-20 11:52:51Z mueller $
+# $Id: generic_cpp.mk 1209 2021-08-22 13:17:33Z mueller $
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright 2011-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
+# Copyright 2011-2021 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
 #
 #  Revision History: 
 # Date         Rev Version  Comment
+# 2021-08-17  1209   1.0.4  use -std=c++17 (gcc 7.3 or later)
 # 2018-09-22  1049   1.0.3  use -Wpedantic
 # 2017-02-03   848   1.0.4  use -std=c++11 (gcc 4.7 or later)
 # 2015-01-04   630   1.0.3  use -Wextra
@@ -47,7 +48,7 @@ ifndef CXXOPTFLAGS
 CXXOPTFLAGS = -O3
 endif
 #
-CXXFLAGS   = -Wall -Wextra -Wpedantic -fPIC -fno-strict-aliasing -std=c++11 
+CXXFLAGS   = -Wall -Wextra -Wpedantic -fPIC -fno-strict-aliasing -std=c++17
 CXXFLAGS  += $(CXXOPTFLAGS) $(INCLFLAGS)
 COMPILE.cc = $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
 #

tools/oskit/u7ed_rp/README.md

@@ -16,7 +16,7 @@ Most in fact work fine because floating point is rarely used, but a simple
 will generate a `core` because awk for example does use floating point
 arithmetic.
 
-**So far only minimal testing on the CmodA7 system (672 kB memory) done.**
+**So far only minimal testing on the Cmod A7 system (672 kB memory) done.**
 
 ### General remarks
 See notes in [w11a_os_guide.md](../../../doc/w11a_os_guide.md) on

tools/src/librlink/RlinkPortCuff.cpp

@@ -1,9 +1,10 @@
-// $Id: RlinkPortCuff.cpp 1186 2019-07-12 17:49:59Z mueller $
+// $Id: RlinkPortCuff.cpp 1209 2021-08-22 13:17:33Z mueller $
 // SPDX-License-Identifier: GPL-3.0-or-later
-// Copyright 2012-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
+// Copyright 2012-2021 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
 // 
 // Revision History: 
 // Date         Rev Version  Comment
+// 2021-08-17  1209   1.1.11 drop libusb_set_debug (now deprecated)
 // 2018-12-18  1089   1.1.10 use c++ style casts
 // 2018-12-17  1088   1.1.9  use std::thread instead of boost
 // 2018-12-14  1081   1.1.8  use std::bind instead of boost
@@ -105,8 +106,8 @@ bool RlinkPortCuff::Open(const std::string& url, RerrMsg& emsg)
     Cleanup();
     return false;
   }
-  // setup libusb level debug
-  libusb_set_debug(fpUsbContext, 3);        // info->stdout, warn+err->stderr
+  //libusb_set_debug is deprecated, libusb_set_option has different features
+  //libusb_set_debug(fpUsbContext, 3);        // info->stdout, warn+err->stderr
 
   // check for internal timeout handling support
   if (libusb_pollfds_handle_timeouts(fpUsbContext) == 0) {

tools/sys/92-retro-usb-persistent.rules

@@ -1,6 +1,6 @@
-# $Id: 92-retro-usb-persistent.rules 1194 2019-07-20 07:43:21Z mueller $
+# $Id: 92-retro-usb-persistent.rules 1205 2020-04-19 08:24:55Z mueller $
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
+# Copyright 2017-2020 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
 #
 # udev rules to create persistent names for Digilent FT2232C style FPGA boards
 #
@@ -13,17 +13,23 @@
 #   interface number are properties of different device layers and multiple
 #   ATTRS{} must match in one layer
 #
-# NOTE: this is an example, adopt ID_SERIAL_SHORT to your needs, use
-#         udevadm info -q all -n /dev/ttyUSB2        # change USB2 to need
+# !!------------------------------------------------------------------------!!
+# !! NOTE: this is an example, using the SERIAL_SHORT of the authors boards !!
+# !!       adopt ID_SERIAL_SHORT to your needs, use                         !!
+# !!       udevadm info -q all -n /dev/ttyUSB1    # change USB1 to needs    !!
+# !!------------------------------------------------------------------------!!
 #
 # - Digilent nexys4 board ------------------------------------------------
 SUBSYSTEM=="tty", ENV{ID_USB_INTERFACE_NUM}=="01", ENV{ID_MODEL}=="Digilent_USB_Device", ENV{ID_SERIAL_SHORT}=="210274628291", SYMLINK="fpga_n4"
 #
+# - Digilent nexys a7 board ----------------------------------------------
+SUBSYSTEM=="tty", ENV{ID_USB_INTERFACE_NUM}=="01", ENV{ID_MODEL}=="Digilent_USB_Device", ENV{ID_SERIAL_SHORT}=="210292AA799F", SYMLINK="fpga_n4d"
+#
 # - Digilent basys3 board ------------------------------------------------
 SUBSYSTEM=="tty", ENV{ID_USB_INTERFACE_NUM}=="01", ENV{ID_MODEL}=="Digilent_USB_Device", ENV{ID_SERIAL_SHORT}=="210183638100", SYMLINK="fpga_b3"
 #
 # - Digilent arty board --------------------------------------------------
 SUBSYSTEM=="tty", ENV{ID_USB_INTERFACE_NUM}=="01", ENV{ID_MODEL}=="Digilent_USB_Device", ENV{ID_SERIAL_SHORT}=="210319788597", SYMLINK="fpga_arty"
 #
-# - Digilent arty board --------------------------------------------------
+# - Digilent cmod a7 board -----------------------------------------------
 SUBSYSTEM=="tty", ENV{ID_USB_INTERFACE_NUM}=="01", ENV{ID_MODEL}=="Digilent_Adept_USB_Device", ENV{ID_SERIAL_SHORT}=="210328A414AD", SYMLINK="fpga_c7"