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Merge tag 'v5.17.6' into 5.17
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This is the 5.17.6 stable release
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@xanmod
xanmod committed May 11, 2022
2 parents 0f38b2e + 431b2c0 commit 9e99d47
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2 changes: 1 addition & 1 deletion Makefile
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@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 17
SUBLEVEL = 5
SUBLEVEL = 6
EXTRAVERSION =
NAME = Superb Owl

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2 changes: 2 additions & 0 deletions arch/arm/boot/dts/am33xx-l4.dtsi
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Expand Up @@ -263,6 +263,8 @@
compatible = "ti,am3359-tscadc";
reg = <0x0 0x1000>;
interrupts = <16>;
clocks = <&adc_tsc_fck>;
clock-names = "fck";
status = "disabled";
dmas = <&edma 53 0>, <&edma 57 0>;
dma-names = "fifo0", "fifo1";
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45 changes: 40 additions & 5 deletions arch/arm/boot/dts/am3517-evm.dts
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Expand Up @@ -161,14 +161,18 @@

/* HS USB Host PHY on PORT 1 */
hsusb1_phy: hsusb1_phy {
pinctrl-names = "default";
pinctrl-0 = <&hsusb1_rst_pins>;
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */
#phy-cells = <0>;
};
};

&davinci_emac {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ethernet_pins>;
status = "okay";
};

&davinci_mdio {
Expand All @@ -193,6 +197,8 @@
};

&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <400000>;
/* User DIP swithes [1:8] / User LEDS [1:2] */
tca6416: gpio@21 {
Expand All @@ -205,6 +211,8 @@
};

&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
clock-frequency = <400000>;
};

Expand All @@ -223,6 +231,8 @@
};

&usbhshost {
pinctrl-names = "default";
pinctrl-0 = <&hsusb1_pins>;
port1-mode = "ehci-phy";
};

Expand All @@ -231,8 +241,35 @@
};

&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <&hsusb1_rst_pins>;

ethernet_pins: pinmux_ethernet_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */
OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */
OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */
OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */
OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */
OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */
OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */
OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */
OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */
OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */
>;
};

i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
>;
};

i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
>;
};

leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
Expand Down Expand Up @@ -300,8 +337,6 @@
};

&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb1_pins>;

hsusb1_pins: pinmux_hsusb1_pins {
pinctrl-single,pins = <
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9 changes: 9 additions & 0 deletions arch/arm/boot/dts/am3517-som.dtsi
View file
Expand Up @@ -69,6 +69,8 @@
};

&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;

s35390a: s35390a@30 {
Expand Down Expand Up @@ -179,6 +181,13 @@

&omap3_pmx_core {

i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
>;
};

wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */
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8 changes: 4 additions & 4 deletions arch/arm/boot/dts/at91-sama5d3_xplained.dts
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Expand Up @@ -57,8 +57,8 @@
};

spi0: spi@f0004000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_cs>;
pinctrl-names = "default", "cs";
pinctrl-1 = <&pinctrl_spi0_cs>;
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
status = "okay";
};
Expand Down Expand Up @@ -171,8 +171,8 @@
};

spi1: spi@f8008000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_cs>;
pinctrl-names = "default", "cs";
pinctrl-1 = <&pinctrl_spi1_cs>;
cs-gpios = <&pioC 25 0>;
status = "okay";
};
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6 changes: 3 additions & 3 deletions arch/arm/boot/dts/at91-sama5d4_xplained.dts
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Expand Up @@ -81,8 +81,8 @@
};

spi1: spi@fc018000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_cs>;
pinctrl-names = "default", "cs";
pinctrl-1 = <&pinctrl_spi1_cs>;
cs-gpios = <&pioB 21 0>;
status = "okay";
};
Expand Down Expand Up @@ -140,7 +140,7 @@
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_spi0_cs: spi0_cs_default {
pinctrl_spi1_cs: spi1_cs_default {
atmel,pins =
<AT91_PIOB 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/at91-sama7g5ek.dts
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Expand Up @@ -465,7 +465,7 @@
pinctrl_flx3_default: flx3_default {
pinmux = <PIN_PD16__FLEXCOM3_IO0>,
<PIN_PD17__FLEXCOM3_IO1>;
bias-disable;
bias-pull-up;
};

pinctrl_flx4_default: flx4_default {
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6 changes: 6 additions & 0 deletions arch/arm/boot/dts/at91sam9g20ek_common.dtsi
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Expand Up @@ -219,6 +219,12 @@
wm8731: wm8731@1b {
compatible = "wm8731";
reg = <0x1b>;

/* PCK0 at 12MHz */
clocks = <&pmc PMC_TYPE_SYSTEM 8>;
clock-names = "mclk";
assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
assigned-clock-rates = <12000000>;
};
};

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4 changes: 2 additions & 2 deletions arch/arm/boot/dts/dra7-l4.dtsi
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Expand Up @@ -4188,11 +4188,11 @@
reg = <0x1d0010 0x4>;
reg-names = "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
<SYSC_IDLE_NO>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
power-domains = <&prm_vpe>;
clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
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10 changes: 8 additions & 2 deletions arch/arm/boot/dts/imx6qdl-apalis.dtsi
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Expand Up @@ -286,6 +286,8 @@
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgtl5000>;
clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_module_3v3_audio>;
VDDIO-supply = <&reg_module_3v3>;
Expand Down Expand Up @@ -517,8 +519,6 @@
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
/* SGTL5000 sys_mclk */
MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
>;
};

Expand Down Expand Up @@ -811,6 +811,12 @@
>;
};

pinctrl_sgtl5000: sgtl5000grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
>;
};

pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/imx6ull-colibri.dtsi
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Expand Up @@ -37,7 +37,7 @@

reg_sd1_vmmc: regulator-sd1-vmmc {
compatible = "regulator-gpio";
gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_reg_sd>;
regulator-always-on;
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15 changes: 15 additions & 0 deletions arch/arm/boot/dts/logicpd-som-lv-35xx-devkit.dts
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Expand Up @@ -11,3 +11,18 @@
model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
};

&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_2_pins>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
};
15 changes: 15 additions & 0 deletions arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
View file
Expand Up @@ -11,3 +11,18 @@
model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
};

&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_2_pins>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
};
15 changes: 0 additions & 15 deletions arch/arm/boot/dts/logicpd-som-lv.dtsi
View file
Expand Up @@ -265,21 +265,6 @@
};
};

&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_2_pins>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
};

&uart2 {
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
pinctrl-names = "default";
Expand Down
2 changes: 2 additions & 0 deletions arch/arm/boot/dts/omap3-gta04.dtsi
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Expand Up @@ -31,6 +31,8 @@
aliases {
display0 = &lcd;
display1 = &tv0;
/delete-property/ mmc2;
/delete-property/ mmc3;
};

ldo_3v3: fixedregulator {
Expand Down
1 change: 0 additions & 1 deletion arch/arm/mach-exynos/Kconfig
View file
Expand Up @@ -17,7 +17,6 @@ menuconfig ARCH_EXYNOS
select EXYNOS_PMU
select EXYNOS_SROM
select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS
select GPIOLIB
select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5
select HAVE_ARM_SCU if SMP
select PINCTRL
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2 changes: 2 additions & 0 deletions arch/arm/mach-omap2/omap4-common.c
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Expand Up @@ -314,10 +314,12 @@ void __init omap_gic_of_init(void)

np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
gic_dist_base_addr = of_iomap(np, 0);
of_node_put(np);
WARN_ON(!gic_dist_base_addr);

np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-twd-timer");
twd_base = of_iomap(np, 0);
of_node_put(np);
WARN_ON(!twd_base);

skip_errata_init:
Expand Down
40 changes: 0 additions & 40 deletions arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi
View file
Expand Up @@ -11,26 +11,6 @@
compatible = "operating-points-v2";
opp-shared;

opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <731000>;
};

opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <731000>;
};

opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <731000>;
};

opp-667000000 {
opp-hz = /bits/ 64 <667000000>;
opp-microvolt = <731000>;
};

opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <761000>;
Expand Down Expand Up @@ -71,26 +51,6 @@
compatible = "operating-points-v2";
opp-shared;

opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <731000>;
};

opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <731000>;
};

opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <731000>;
};

opp-667000000 {
opp-hz = /bits/ 64 <667000000>;
opp-microvolt = <731000>;
};

opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <731000>;
Expand Down

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