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[PowerPC] Make use of VSX f64 <-> i64 conversion instructions
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When VSX is available, these instructions should be used in preference to the
older variants that only have access to the scalar floating-point registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204559 91177308-0d34-0410-b5e6-96231b3b80d8
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Hal Finkel committed Mar 23, 2014
1 parent fb51aac commit b6cbecd
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Showing 4 changed files with 111 additions and 6 deletions.
18 changes: 12 additions & 6 deletions lib/Target/PowerPC/PPCInstrVSX.td
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Original file line number Diff line number Diff line change
Expand Up @@ -414,25 +414,31 @@ let Uses = [RM] in {
"xscvdpsp $XT, $XB", IIC_VecFP, []>;
def XSCVDPSXDS : XX2Form<60, 344,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvdpsxds $XT, $XB", IIC_VecFP, []>;
"xscvdpsxds $XT, $XB", IIC_VecFP,
[(set f64:$XT, (PPCfctidz f64:$XB))]>;
def XSCVDPSXWS : XX2Form<60, 88,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvdpsxws $XT, $XB", IIC_VecFP, []>;
"xscvdpsxws $XT, $XB", IIC_VecFP,
[(set f64:$XT, (PPCfctiwz f64:$XB))]>;
def XSCVDPUXDS : XX2Form<60, 328,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvdpuxds $XT, $XB", IIC_VecFP, []>;
"xscvdpuxds $XT, $XB", IIC_VecFP,
[(set f64:$XT, (PPCfctiduz f64:$XB))]>;
def XSCVDPUXWS : XX2Form<60, 72,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvdpuxws $XT, $XB", IIC_VecFP, []>;
"xscvdpuxws $XT, $XB", IIC_VecFP,
[(set f64:$XT, (PPCfctiwuz f64:$XB))]>;
def XSCVSPDP : XX2Form<60, 329,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvspdp $XT, $XB", IIC_VecFP, []>;
def XSCVSXDDP : XX2Form<60, 376,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvsxddp $XT, $XB", IIC_VecFP, []>;
"xscvsxddp $XT, $XB", IIC_VecFP,
[(set f64:$XT, (PPCfcfid f64:$XB))]>;
def XSCVUXDDP : XX2Form<60, 360,
(outs vsrc:$XT), (ins vsrc:$XB),
"xscvuxddp $XT, $XB", IIC_VecFP, []>;
"xscvuxddp $XT, $XB", IIC_VecFP,
[(set f64:$XT, (PPCfcfidu f64:$XB))]>;

def XVCVDPSP : XX2Form<60, 393,
(outs vsrc:$XT), (ins vsrc:$XB),
Expand Down
49 changes: 49 additions & 0 deletions test/CodeGen/PowerPC/float-to-int.ll
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Expand All @@ -12,6 +13,12 @@ define i64 @foo(float %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr

; CHECK-VSX: @foo
; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}

define i64 @foo2(double %a) nounwind {
Expand All @@ -23,6 +30,12 @@ define i64 @foo2(double %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr

; CHECK-VSX: @foo2
; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}

define i64 @foo3(float %a) nounwind {
Expand All @@ -34,6 +47,12 @@ define i64 @foo3(float %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr

; CHECK-VSX: @foo3
; CHECK-VSX: xscvdpuxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}

define i64 @foo4(double %a) nounwind {
Expand All @@ -45,6 +64,12 @@ define i64 @foo4(double %a) nounwind {
; CHECK: stfd [[REG]],
; CHECK: ld 3,
; CHECK: blr

; CHECK-VSX: @foo4
; CHECK-VSX: xscvdpuxds [[REG:[0-9]+]], 1
; CHECK-VSX: stxsdx [[REG]],
; CHECK-VSX: ld 3,
; CHECK-VSX: blr
}

define i32 @goo(float %a) nounwind {
Expand All @@ -56,6 +81,12 @@ define i32 @goo(float %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr

; CHECK-VSX: @goo
; CHECK-VSX: xscvdpsxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}

define i32 @goo2(double %a) nounwind {
Expand All @@ -67,6 +98,12 @@ define i32 @goo2(double %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr

; CHECK-VSX: @goo2
; CHECK-VSX: xscvdpsxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}

define i32 @goo3(float %a) nounwind {
Expand All @@ -78,6 +115,12 @@ define i32 @goo3(float %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr

; CHECK-VSX: @goo3
; CHECK-VSX: xscvdpuxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}

define i32 @goo4(double %a) nounwind {
Expand All @@ -89,5 +132,11 @@ define i32 @goo4(double %a) nounwind {
; CHECK: stfiwx [[REG]],
; CHECK: lwz 3,
; CHECK: blr

; CHECK-VSX: @goo4
; CHECK-VSX: xscvdpuxws [[REG:[0-9]+]], 1
; CHECK-VSX: stfiwx [[REG]],
; CHECK-VSX: lwz 3,
; CHECK-VSX: blr
}

25 changes: 25 additions & 0 deletions test/CodeGen/PowerPC/i32-to-float.ll
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Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr6 | FileCheck -check-prefix=CHECK-PWR6 %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

Expand Down Expand Up @@ -29,6 +30,12 @@ entry:
; CHECK-A2: lfiwax [[REG:[0-9]+]],
; CHECK-A2: fcfids 1, [[REG]]
; CHECK-A2: blr

; CHECK-VSX: @foo
; CHECK-VSX: stw 3,
; CHECK-VSX: lfiwax [[REG:[0-9]+]],
; CHECK-VSX: fcfids 1, [[REG]]
; CHECK-VSX: blr
}

define double @goo(i32 %a) nounwind {
Expand All @@ -54,6 +61,12 @@ entry:
; CHECK-A2: lfiwax [[REG:[0-9]+]],
; CHECK-A2: fcfid 1, [[REG]]
; CHECK-A2: blr

; CHECK-VSX: @goo
; CHECK-VSX: stw 3,
; CHECK-VSX: lfiwax [[REG:[0-9]+]],
; CHECK-VSX: xscvsxddp 1, [[REG]]
; CHECK-VSX: blr
}

define float @foou(i32 %a) nounwind {
Expand All @@ -66,6 +79,12 @@ entry:
; CHECK-A2: lfiwzx [[REG:[0-9]+]],
; CHECK-A2: fcfidus 1, [[REG]]
; CHECK-A2: blr

; CHECK-VSX: @foou
; CHECK-VSX: stw 3,
; CHECK-VSX: lfiwzx [[REG:[0-9]+]],
; CHECK-VSX: fcfidus 1, [[REG]]
; CHECK-VSX: blr
}

define double @goou(i32 %a) nounwind {
Expand All @@ -78,5 +97,11 @@ entry:
; CHECK-A2: lfiwzx [[REG:[0-9]+]],
; CHECK-A2: fcfidu 1, [[REG]]
; CHECK-A2: blr

; CHECK-VSX: @goou
; CHECK-VSX: stw 3,
; CHECK-VSX: lfiwzx [[REG:[0-9]+]],
; CHECK-VSX: xscvuxddp 1, [[REG]]
; CHECK-VSX: blr
}

25 changes: 25 additions & 0 deletions test/CodeGen/PowerPC/i64-to-float.ll
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

Expand All @@ -12,6 +13,12 @@ entry:
; CHECK: lfd [[REG:[0-9]+]],
; CHECK: fcfids 1, [[REG]]
; CHECK: blr

; CHECK-VSX: @foo
; CHECK-VSX: std 3,
; CHECK-VSX: lxsdx [[REG:[0-9]+]],
; CHECK-VSX: fcfids 1, [[REG]]
; CHECK-VSX: blr
}

define double @goo(i64 %a) nounwind {
Expand All @@ -24,6 +31,12 @@ entry:
; CHECK: lfd [[REG:[0-9]+]],
; CHECK: fcfid 1, [[REG]]
; CHECK: blr

; CHECK-VSX: @goo
; CHECK-VSX: std 3,
; CHECK-VSX: lxsdx [[REG:[0-9]+]],
; CHECK-VSX: xscvsxddp 1, [[REG]]
; CHECK-VSX: blr
}

define float @foou(i64 %a) nounwind {
Expand All @@ -36,6 +49,12 @@ entry:
; CHECK: lfd [[REG:[0-9]+]],
; CHECK: fcfidus 1, [[REG]]
; CHECK: blr

; CHECK-VSX: @foou
; CHECK-VSX: std 3,
; CHECK-VSX: lxsdx [[REG:[0-9]+]],
; CHECK-VSX: fcfidus 1, [[REG]]
; CHECK-VSX: blr
}

define double @goou(i64 %a) nounwind {
Expand All @@ -48,5 +67,11 @@ entry:
; CHECK: lfd [[REG:[0-9]+]],
; CHECK: fcfidu 1, [[REG]]
; CHECK: blr

; CHECK-VSX: @goou
; CHECK-VSX: std 3,
; CHECK-VSX: lxsdx [[REG:[0-9]+]],
; CHECK-VSX: xscvuxddp 1, [[REG]]
; CHECK-VSX: blr
}

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