You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
In our design there are D flipflops and fifo registers. After synthesing in yosys , it has been renamed as
sky130_fd_sc_hd_dfrtp_2 _14258 (
.CLK(CLK),
.D(00157),
.Q(mv_output[20]),
.RESET_B(RST_N)
);
Why the registers are not having actual names as fed in RTL?
How to figure the actual names of the flipflop in yosys?
The text was updated successfully, but these errors were encountered:
Does your script call recover_names or autoname?
I am using yosys in openlane and I am running with default .tcl files. I didn't find any of those commands that you have mentioned in my yosys script.
I'm not familiar with OpenLane myself, but according to this PR opt-in support (using the SYNTH_AUTONAME variable) for autoname was merged earlier this year: The-OpenROAD-Project/OpenLane#1577
In our design there are D flipflops and fifo registers. After synthesing in yosys , it has been renamed as
sky130_fd_sc_hd_dfrtp_2 _14258 (
.CLK(CLK),
.D(00157),
.Q(mv_output[20]),
.RESET_B(RST_N)
);
Why the registers are not having actual names as fed in RTL?
How to figure the actual names of the flipflop in yosys?
The text was updated successfully, but these errors were encountered: