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boards/x86: up_squared: add I2C configurations
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Add the necessary bits to enable the I2C controllers on
the UP Squared board. Only the ones exposed through the HAT
connector(s) are enabled by default.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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@dcpleung @nashif
dcpleung authored and nashif committed Jul 27, 2018
1 parent 44be394 commit bcc9523
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Showing 5 changed files with 176 additions and 0 deletions.
1 change: 1 addition & 0 deletions boards/x86/up_squared/Kconfig.board
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Expand Up @@ -8,3 +8,4 @@ config BOARD_UP_SQUARED
bool "UP Squared (Pentium/Celeron)"
depends on SOC_APOLLO_LAKE
select HAS_DTS
select HAS_DTS_I2C
13 changes: 13 additions & 0 deletions boards/x86/up_squared/Kconfig.defconfig
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Expand Up @@ -7,4 +7,17 @@ config BOARD
config BUILD_OUTPUT_STRIPPED
def_bool y

if I2C

config I2C_DW
def_bool y

config I2C_0
def_bool y

config I2C_1
def_bool y

endif # I2C

endif # BOARD_UP_SQUARED
56 changes: 56 additions & 0 deletions boards/x86/up_squared/dts.fixup
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Expand Up @@ -22,4 +22,60 @@
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_91522000_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_91522000_CLOCK_FREQUENCY

#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_91534000_LABEL
#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_91534000_BASE_ADDRESS
#define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_91534000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI SNPS_DESIGNWARE_I2C_91534000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91534000_IRQ_0_SENSE
#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_91534000_CLOCK_FREQUENCY

#define CONFIG_I2C_1_NAME SNPS_DESIGNWARE_I2C_91532000_LABEL
#define CONFIG_I2C_1_BASE_ADDR SNPS_DESIGNWARE_I2C_91532000_BASE_ADDRESS
#define CONFIG_I2C_1_IRQ SNPS_DESIGNWARE_I2C_91532000_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI SNPS_DESIGNWARE_I2C_91532000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91532000_IRQ_0_SENSE
#define CONFIG_I2C_1_BITRATE SNPS_DESIGNWARE_I2C_91532000_CLOCK_FREQUENCY

#define CONFIG_I2C_2_NAME SNPS_DESIGNWARE_I2C_91530000_LABEL
#define CONFIG_I2C_2_BASE_ADDR SNPS_DESIGNWARE_I2C_91530000_BASE_ADDRESS
#define CONFIG_I2C_2_IRQ SNPS_DESIGNWARE_I2C_91530000_IRQ_0
#define CONFIG_I2C_2_IRQ_PRI SNPS_DESIGNWARE_I2C_91530000_IRQ_0_PRIORITY
#define CONFIG_I2C_2_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91530000_IRQ_0_SENSE
#define CONFIG_I2C_2_BITRATE SNPS_DESIGNWARE_I2C_91530000_CLOCK_FREQUENCY

#define CONFIG_I2C_3_NAME SNPS_DESIGNWARE_I2C_9152E000_LABEL
#define CONFIG_I2C_3_BASE_ADDR SNPS_DESIGNWARE_I2C_9152E000_BASE_ADDRESS
#define CONFIG_I2C_3_IRQ SNPS_DESIGNWARE_I2C_9152E000_IRQ_0
#define CONFIG_I2C_3_IRQ_PRI SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_PRIORITY
#define CONFIG_I2C_3_IRQ_FLAGS SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_SENSE
#define CONFIG_I2C_3_BITRATE SNPS_DESIGNWARE_I2C_9152E000_CLOCK_FREQUENCY

#define CONFIG_I2C_4_NAME SNPS_DESIGNWARE_I2C_9152C000_LABEL
#define CONFIG_I2C_4_BASE_ADDR SNPS_DESIGNWARE_I2C_9152C000_BASE_ADDRESS
#define CONFIG_I2C_4_IRQ SNPS_DESIGNWARE_I2C_9152C000_IRQ_0
#define CONFIG_I2C_4_IRQ_PRI SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_PRIORITY
#define CONFIG_I2C_4_IRQ_FLAGS SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_SENSE
#define CONFIG_I2C_4_BITRATE SNPS_DESIGNWARE_I2C_9152C000_CLOCK_FREQUENCY

#define CONFIG_I2C_5_NAME SNPS_DESIGNWARE_I2C_9152A000_LABEL
#define CONFIG_I2C_5_BASE_ADDR SNPS_DESIGNWARE_I2C_9152A000_BASE_ADDRESS
#define CONFIG_I2C_5_IRQ SNPS_DESIGNWARE_I2C_9152A000_IRQ_0
#define CONFIG_I2C_5_IRQ_PRI SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_PRIORITY
#define CONFIG_I2C_5_IRQ_FLAGS SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_SENSE
#define CONFIG_I2C_5_BITRATE SNPS_DESIGNWARE_I2C_9152A000_CLOCK_FREQUENCY

#define CONFIG_I2C_6_NAME SNPS_DESIGNWARE_I2C_91528000_LABEL
#define CONFIG_I2C_6_BASE_ADDR SNPS_DESIGNWARE_I2C_91528000_BASE_ADDRESS
#define CONFIG_I2C_6_IRQ SNPS_DESIGNWARE_I2C_91528000_IRQ_0
#define CONFIG_I2C_6_IRQ_PRI SNPS_DESIGNWARE_I2C_91528000_IRQ_0_PRIORITY
#define CONFIG_I2C_6_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91528000_IRQ_0_SENSE
#define CONFIG_I2C_6_BITRATE SNPS_DESIGNWARE_I2C_91528000_CLOCK_FREQUENCY

#define CONFIG_I2C_7_NAME SNPS_DESIGNWARE_I2C_91526000_LABEL
#define CONFIG_I2C_7_BASE_ADDR SNPS_DESIGNWARE_I2C_91526000_BASE_ADDRESS
#define CONFIG_I2C_7_IRQ SNPS_DESIGNWARE_I2C_91526000_IRQ_0
#define CONFIG_I2C_7_IRQ_PRI SNPS_DESIGNWARE_I2C_91526000_IRQ_0_PRIORITY
#define CONFIG_I2C_7_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91526000_IRQ_0_SENSE
#define CONFIG_I2C_7_BITRATE SNPS_DESIGNWARE_I2C_91526000_CLOCK_FREQUENCY

/* End of Board Level DTS fixup file */
105 changes: 105 additions & 0 deletions boards/x86/up_squared/up_squared.dts
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Expand Up @@ -10,6 +10,7 @@
#define DT_SRAM_SIZE __SIZE_K(2097152)

#include <apollo_lake.dtsi>
#include <dt-bindings/i2c/i2c.h>

/ {
model = "up_squared";
Expand Down Expand Up @@ -48,5 +49,109 @@
status = "ok";
current-speed = <115200>;
};

i2c0: i2c@91534000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x91534000 0x1000>;
interrupts = <27 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_0";

status = "ok";
};

i2c1: i2c@91532000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x91532000 0x1000>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_1";

status = "ok";
};

i2c2: i2c@91530000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x91530000 0x1000>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_2";

status = "ok";
};

i2c3: i2c@9152e000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x9152e000 0x1000>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_3";

status = "ok";
};

i2c4: i2c@9152c000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x9152c000 0x1000>;
interrupts = <31 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_4";

status = "ok";
};

i2c5: i2c@9152a000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x9152a000 0x1000>;
interrupts = <32 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_5";

status = "ok";
};

i2c6: i2c@91528000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x9158000 0x1000>;
interrupts = <33 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_6";

status = "ok";
};

i2c7: i2c@91526000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x91526000 0x1000>;
interrupts = <34 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
label = "I2C_7";

status = "ok";
};
};
};
1 change: 1 addition & 0 deletions boards/x86/up_squared/up_squared_defconfig
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Expand Up @@ -12,3 +12,4 @@ CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_I2C=y

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