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optimize x86 userspace page table memory usage #13441
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area: Memory Protection
Enhancement
Changes/Updates/Additions to existing features
priority: low
Low impact/importance bug
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andrewboie
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area: Memory Protection
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Feb 15, 2019
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andrewboie
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Jul 26, 2019
Two of these sub-items resolved by #17959 |
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The current API was assuming too much, in that it expected that arch-specific memory domain configuration is only maintained in some global area, and updates to domains that are not currently active have no effect. This was true when all memory domain state was tracked in page tables or MPU registers, but no longer works when arch-specific memory management information is stored in thread-specific areas. This is needed for: zephyrproject-rtos#13441 zephyrproject-rtos#13074 zephyrproject-rtos#15135 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
kraj
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Aug 5, 2019
The current API was assuming too much, in that it expected that arch-specific memory domain configuration is only maintained in some global area, and updates to domains that are not currently active have no effect. This was true when all memory domain state was tracked in page tables or MPU registers, but no longer works when arch-specific memory management information is stored in thread-specific areas. This is needed for: zephyrproject-rtos#13441 zephyrproject-rtos#13074 zephyrproject-rtos#15135 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
LeiW000
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Sep 2, 2019
The current API was assuming too much, in that it expected that arch-specific memory domain configuration is only maintained in some global area, and updates to domains that are not currently active have no effect. This was true when all memory domain state was tracked in page tables or MPU registers, but no longer works when arch-specific memory management information is stored in thread-specific areas. This is needed for: zephyrproject-rtos#13441 zephyrproject-rtos#13074 zephyrproject-rtos#15135 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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Labels
area: Memory Protection
Enhancement
Changes/Updates/Additions to existing features
priority: low
Low impact/importance bug
We have some memory usage problems with how x86 is setting up page tables:
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