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spi_nor Erase operation selection is excessively conservative #60904
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area: SPI
SPI bus
bug
The issue is a bug, or the PR is fixing a bug
priority: low
Low impact/importance bug
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@Crzyrndm, the check should indeed be that the (remaining) size is larger or equal to the erase size. Could you provide a PR ? |
Crzyrndm
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Jul 28, 2023
The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases See zephyrproject-rtos#60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
PR has been opened. I think I got all the neccesary conventions covered but feel free to just fix it if more needs doing |
Crzyrndm
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The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases Closes zephyrproject-rtos#60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
Crzyrndm
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The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases Closes zephyrproject-rtos#60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
carlescufi
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Aug 4, 2023
The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases Closes #60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
kunoh
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Aug 7, 2023
The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases Closes zephyrproject-rtos#60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
This was referenced Aug 8, 2023
umarnisar92
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Aug 15, 2023
The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases Closes zephyrproject-rtos#60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
meshium
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Aug 16, 2023
The spi_nor erase op selection was based on the alignment of the end of the region to be erased. This prevented larger erase operations being selected in many cases Closes zephyrproject-rtos#60904 Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
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Labels
area: SPI
SPI bus
bug
The issue is a bug, or the PR is fixing a bug
priority: low
Low impact/importance bug
Summary: SPI_NOR driver is selecting a smaller erase operation in in many situations it doesn't need to
SPI NOR FLASH devices often have multiple erase sizes. 4k, 32k and 64k are very typical.
When
spi_nor_erase
(link) is invoked part of the loop attempts to pick the largest erase operation for the current address and remaining size (link)I was erasing parts of a 512MiB NOR device today and observed extremely slow erase speeds. I found that many of the erase operation where using only the 4kiB erase even when the address/remainder was suitable for a much larger operation.
I extracted the main parts of the op selector in order to confirm my suspicions. This can be seen here
What I would expect to see is that 4k erases are used until 32k is reached, a 32k erase to get to 64k then 64k erases until the last 16 kB. What actually happens is that only 4k erases are used.
The problem is this line. For a larger erase op to be chosen, the final end address must be aligned with that op size. In my example above, the end is only 16kB aligned so this never occurs
The correct check would be
size >= (1 << etp->exp)
(updated example. Change is to line 30). This results in the desired/expected output with the largest applicable erase op being used at each stepThe text was updated successfully, but these errors were encountered: