cmake: x86 and xtensa toolchain updates for SDK 0.11 #20221
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dcpleung
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andrewboie,
andyross,
nashif,
sathishkuttan and
SebastianBoe
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This was referenced Oct 29, 2019
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area: Toolchains
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andrewboie
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Oct 31, 2019
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FYI, this would not pass CI until we have 0.11 SDK, since the Xtensa sample_controller toolchain cannot compile for intel_s1000. |
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Newlib requires a _heap_sentry so we add it to the linker script, similar to what other xtensa linker scripts. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
One of the return variable is declared and used, but never assigned values. So fix it. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When not using XCC, XCHAL_CACHE_MEMCTL_DEFAULT is not defined which results in some variables not being able to be defined. So define them. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are compiler error about the entry functions of two threads not returning anything. So add return statement to fix it. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Including math.h requires Newlib so enable it in project configuration file. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use assembly for _xt_set_intset() and _xt_set_intclear() instead of calling into the Xtensa HAL, allowing these to be inlined. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The DT_LP_SRAM_* are aliases to DT_MIMO_SRAM_1_* which are deprecated, so changing these to DT_INST_1_MMIO_SRAM_*. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds support for Zephyr SDK 0.11.* by simply copying from 0.10. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Xtensa requires building a new toolchain for a specific SoC. By default xtools built Xtensa toolchains all have prefix of xtensa-zephyr-elf. In order to distinguish different toolchains, they are now placed in their own directories under their SoC name. This allows us to have multiple Xtensa toolchains targeting multiple SoCs. The additional level in path name is introduced in SDK v0.11. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The x86_64 toolchain in the SDK has been updated to build for 32-bit targets (as it has 32-bit soft float libraries). So change both xtools and v0.11 SDK to use x86_64 to build for 32-bit x86 targets. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows applications targeting intel_s1000_crb to be compiled with sdk or xtools toolchain. Also copy the testing ignore_tags from qemu_xtensa for net and bluetooth. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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Most of these are merged. The remaining patches can be submitted separately. |
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This includes the cmake changes needed for x86 and xtensa toolchains in SDK 0.11.
Includes:
intel_s1000_crbboard, it is now possible to build for this board using Zephyr SDK. Changes are included to make this work, and these will allow us to build in CI.