devicetree: atmel sam0: Convert UART to DT_INST and full devicetree #24572
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galak
added
area: Devicetree
platform: Microchip SAM
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This was referenced Apr 21, 2020
Add support for the GCLK, MCLK, and PM clock controllers. Add bindings and devicetree nodes associated with these clock controllers. Also add clock references for the SERCOM peripheral set to allow those drivers (i2c, spi, uart) to utilize this information. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the atmel,sam0-dmac binding under the dma binding dir and add cell information for channel and trigger source. Update the associated dtsi files to match these changes. This is in prep of ATMEL SAM0 SERCOMM devices like UART, I2C, and SPI to user proper 'dmas' property to specify the dma info to use. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a common header for SAM0 drivers to use to extract data from devicetree. The initial set of macros are for get the MCLK A*MASK register address for clock enablement and a set of macros for use with DMA to get the channel and trigger source or 0xff if there is no dmas property. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per instance data for clocks and dma from devicetree. We update the atmel,sam0-uart binding for dma to replace the rxdma and txdma properties with proper 'dmas' property. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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Verified working on SAM E54. |
stephanosio
approved these changes
Apr 22, 2020
This was referenced Apr 22, 2020
nandojve
approved these changes
Apr 23, 2020
| trigger source. | ||
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| For example dmas for TX, RX on SERCOM3 | ||
| dmas = <&dmac 0 0xb>, <&dmac 0 0xa>; |
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I think important add MCU model when given example. For SAMR21 SERCOM3 triggers are 0x8 and 0x7.
Not sure about dma channels, but I believe should be 1 and 0, for instance.
For example the MCU xxxx dmas for TX, RX on SERCOM3
dmas = <&dmac 1 0xb>, <&dmac 0 0xa>;
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I tested normal UART with SAMD20 and SAMR21 using shell. |
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Add clock support for MCLK, GCLK, and PM to allow SAM0 drivers to be full devicetree based. Also move to proper dma devicetree support.