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boards: nxp: frdm_mcxn947: enable USDHC0 #72601
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nashif
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zephyrproject-rtos:main
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nxp-upstream:feature/mcxn947-usdhc
May 15, 2024
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b6b79b0
drivers: sdhc: imx_usdhc: move voltage selection to separate function
danieldegrasse 6ea3b91
drivers: sdhc: imx_usdhc: remove dead code for waiting for clock gate
danieldegrasse e123313
drivers: sdhc: imx_usdhc: extend reset timeout duration
danieldegrasse c079ba5
dts: arm: nxp: mcxn94x: add USDHC0 node
danieldegrasse 37f3e83
boards: nxp: frdm_mcxn947: add support for USDHC0
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Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -23,4 +23,5 @@ supported: | |
- watchdog | ||
- pwm | ||
- counter | ||
- sdhc | ||
vendor: nxp |
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Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -159,6 +159,14 @@ static void card_detect_gpio_cb(const struct device *port, | |
} | ||
} | ||
|
||
static void imx_usdhc_select_1_8v(USDHC_Type *base, bool enable_1_8v) | ||
{ | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. does this give no warning about empty body? |
||
#if !(defined(FSL_FEATURE_USDHC_HAS_NO_VOLTAGE_SELECT) && \ | ||
(FSL_FEATURE_USDHC_HAS_NO_VOLTAGE_SELECT)) | ||
UDSHC_SelectVoltage(base, enable_1_8v); | ||
#endif | ||
} | ||
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||
|
||
static int imx_usdhc_dat3_pull(const struct usdhc_config *cfg, bool pullup) | ||
{ | ||
|
@@ -256,7 +264,7 @@ static int imx_usdhc_reset(const struct device *dev) | |
{ | ||
const struct usdhc_config *cfg = dev->config; | ||
/* Switch to default I/O voltage of 3.3V */ | ||
UDSHC_SelectVoltage(cfg->base, false); | ||
imx_usdhc_select_1_8v(cfg->base, false); | ||
USDHC_EnableDDRMode(cfg->base, false, 0U); | ||
#if defined(FSL_FEATURE_USDHC_HAS_SDR50_MODE) && (FSL_FEATURE_USDHC_HAS_SDR50_MODE) | ||
USDHC_EnableStandardTuning(cfg->base, 0, 0, false); | ||
|
@@ -271,22 +279,7 @@ static int imx_usdhc_reset(const struct device *dev) | |
#endif | ||
|
||
/* Reset data/command/tuning circuit */ | ||
return USDHC_Reset(cfg->base, kUSDHC_ResetAll, 100U) == true ? 0 : -ETIMEDOUT; | ||
} | ||
|
||
/* Wait for USDHC to gate clock when it is disabled */ | ||
static inline void imx_usdhc_wait_clock_gate(USDHC_Type *base) | ||
{ | ||
uint32_t timeout = 1000; | ||
|
||
while (timeout--) { | ||
if (base->PRES_STATE & USDHC_PRES_STATE_SDOFF_MASK) { | ||
break; | ||
} | ||
} | ||
if (timeout == 0) { | ||
LOG_WRN("SD clock did not gate in time"); | ||
} | ||
return USDHC_Reset(cfg->base, kUSDHC_ResetAll, 1000U) == true ? 0 : -ETIMEDOUT; | ||
} | ||
|
||
/* | ||
|
@@ -353,7 +346,7 @@ static int imx_usdhc_set_io(const struct device *dev, struct sdhc_io *ios) | |
switch (ios->signal_voltage) { | ||
case SD_VOL_3_3_V: | ||
case SD_VOL_3_0_V: | ||
UDSHC_SelectVoltage(cfg->base, false); | ||
imx_usdhc_select_1_8v(cfg->base, false); | ||
break; | ||
case SD_VOL_1_8_V: | ||
/** | ||
|
@@ -367,7 +360,7 @@ static int imx_usdhc_set_io(const struct device *dev, struct sdhc_io *ios) | |
* 10 ms, then allow it to be gated again. | ||
*/ | ||
/* Switch to 1.8V */ | ||
UDSHC_SelectVoltage(cfg->base, true); | ||
imx_usdhc_select_1_8v(cfg->base, true); | ||
/* Wait 10 ms- clock will be gated during this period */ | ||
k_msleep(10); | ||
/* Force the clock on */ | ||
|
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meaning "for most in tree samples" it needs a larger main stack size?