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NJU_MIPS.v
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NJU_MIPS.v
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//=======================================================
// This code is generated by Terasic System Builder
//=======================================================
module NJU_MIPS(
//////////// CLOCK //////////
input CLOCK2_50,
input CLOCK3_50,
input CLOCK4_50,
input CLOCK_50,
//////////// KEY //////////
input [3:0] KEY,
//////////// SW //////////
input [9:0] SW,
//////////// LED //////////
output [9:0] LEDR,
//////////// Seg7 //////////
output [6:0] HEX0,
output [6:0] HEX1,
output [6:0] HEX2,
output [6:0] HEX3,
output [6:0] HEX4,
output [6:0] HEX5,
//////////// VGA //////////
output VGA_BLANK_N,
output [7:0] VGA_B,
output VGA_CLK,
output [7:0] VGA_G,
output VGA_HS,
output [7:0] VGA_R,
output VGA_SYNC_N,
output VGA_VS,
//////////// Audio //////////
input AUD_ADCDAT,
inout AUD_ADCLRCK,
inout AUD_BCLK,
output AUD_DACDAT,
inout AUD_DACLRCK,
output AUD_XCK,
//////////// PS2 //////////
inout PS2_CLK,
inout PS2_CLK2,
inout PS2_DAT,
inout PS2_DAT2,
//////////// I2C for Audio and Video-In //////////
output FPGA_I2C_SCLK,
inout FPGA_I2C_SDAT
);
//=======================================================
// REG/WIRE declarations
//=======================================================
//=======================================================
// Structural coding
//=======================================================
wire [11:0] vga_rdaddress;
wire [7:0] vga_q;
wire [7:0] kb_ascii;
wire [7:0] kb_code;
wire kb_en;
wire audio_en;
sopc cpu(
.CLOCK_50(CLOCK_50),
.rst(!KEY[0]),
.debug(),
.vga_q(vga_q),
.vga_rdaddress(vga_rdaddress),
.input_ascii(kb_ascii),
.input_en(kb_en),
.audio_en(audio_en)
);
vga video_output(
.CLOCK_50(CLOCK_50),
.VGA_BLANK_N(VGA_BLANK_N),
.VGA_B(VGA_B),
.VGA_CLK(VGA_CLK),
.VGA_G(VGA_G),
.VGA_HS(VGA_HS),
.VGA_R(VGA_R),
.VGA_SYNC_N(VGA_SYNC_N),
.VGA_VS(VGA_VS),
.q(vga_q),
.rdaddress(vga_rdaddress)
);
keyboard kb(
.clk(CLOCK_50),
.ps2_clk(PS2_CLK),
.ps2_data(PS2_DAT),
.ascii_out(kb_ascii),
.en(kb_en),
.kb_code(kb_code)
);
audio player(
.clk(CLOCK_50),
.DACLRCLK(AUD_DACLRCK),
.DACDAT(AUD_DACDAT),
.XCK(AUD_XCK),
.BCLK(AUD_BCLK),
.I2C_SCLK(AUD_ADCLRCK),
.I2C_SDAT(AUD_ADCDAT),
.ch_n(KEY[3]),
.dirs(SW[9]),
.ken(kb_en),
.kb_code(kb_code),
.en(audio_en)
);
endmodule