Add missing assembly instructions to the x86 backend

[Arnau478]

The x86 backend was missing some important instructions. They're not generated by the compiler, but having them ensures they can be used in inline assembly. Added tests for all of them. Control registers were also added. A list of added instructions:

• rdmsr
• wrmsr
• sysret
• cmc
• clc
• stc
• cli
• sti
• cld
• std
• int1
• int
• iret
• hlt

Fixes #19773

[sfiedler0]

It would be a good idea to add the int instruction (which throws an interrupt and is really good for testing interrupt handling in the kernel).

[Arnau478]

It would be a good idea to add the int instruction (which throws an interrupt and is really good for testing interrupt handling in the kernel).

That's true, int and iret were missing! Added them in b5d7804 and edited original comment

[sfiedler0]

Probably also some instructions related to inb and outb (and inw and so on)?
Port I/O is really important for kernels (UART logging, PIC communicating, PS/2 and whatever)

[Arnau478]

Probably also some instructions related to inb and outb (and inw and so on)? Port I/O is really important for kernels (UART logging, PIC communicating, PS/2 and whatever)

The thing is, in/out instructions are kind of weird. Like rdmsr and wrmsr, they have implicit register operands. However, they are usually written with the operands being explicit (even though only al/ax/eax and dx are allowed, respectively). This wouldn't fit the current assembler implementation. Also, there are many ways to do it (size postfix, explicit register, or both), regarding language design. I think it should be made a separate issue and debated there. Either way, it requires a design decision that I hope someone with an important role in the organization can make.

[jacobly0]

Unfortunately, the CI does not run any tests in src, and the tests added in this PR do not pass as many of the added encodings are wrong. If you prefer, you can make these changes upstream first where the CI does run the tests. Also note that without Mir encodings most of these instructions will not be usable in inline asm, which should have been obvious if any amount of testing had been done before creating this PR. I'm afraid making these kind of changes requires a lot of attention to detail to get right.

[Arnau478]

@jacobly0 I'm sorry, I missed the Mir. I will set the PR as a draft for now, in case someone wants to address the linked issue while I work on it. Thanks for mentioning the upstream.

[jacobly0]

The thing is, in/out instructions are kind of weird. Like rdmsr and wrmsr, they have implicit register operands. However, they are usually written with the operands being explicit (even though only al/ax/eax and dx are allowed, respectively).

See stos/stosb etc for an example of how to implement this.