PL011 UART not in Peripheral region for Cortex-M hello world

[flit]

Tool-Solutions/hello-world_fast-models/Cortex-M/system/Cortex-M.lisa

Line 22 in 12822ec

BusDecoder.pvbus_m_range[0x1c090000..0x1c09ffff] => pl011_uart.pvbus;

The v8-M architecture defines the address range of 0x4000_0000–0x0x5FFF_FFFF as the Peripheral region in the system address map. Peripherals should normally be placed in this address range so they have the correct memory type (Device, nGnRE) and attributes (XN, non-cacheable). 0xA000_0000–0xDFFFFFFF are also Device regions, but the Peripheral region is preferred.

[jasonrandrews]

Good to know and noted if there are future changes to the system.