feat: Sync from noir (#6717)

Automated pull of development from the
[noir](https://github.com/noir-lang/noir) programming language, a
dependency of Aztec.
BEGIN_COMMIT_OVERRIDE
chore: deduplicate `ReturnConstant` warning
(noir-lang/noir#5109)
feat: Sync from aztec-packages
(noir-lang/noir#5125)
chore: remove warnings field from `DebugArtifact`
(noir-lang/noir#5118)
feat: make ACVM generic across fields
(noir-lang/noir#5114)
fix: Auto dereference trait methods in the elaborator
(noir-lang/noir#5124)
chore: perform dead instruction elimination through `std::as_witness`
(noir-lang/noir#5123)
END_COMMIT_OVERRIDE

---------

Co-authored-by: TomAFrench <tom@tomfren.ch>

.noir-sync-commit

@@ -1 +1 @@
-e4eb5f539f377fd3c2e1a874707ffce62a5bc10a
+a2894047f580a8861898d71cd335c06ee53290a4

avm-transpiler/src/transpile.rs

@@ -6,7 +6,7 @@ use acvm::acir::circuit::OpcodeLocation;
 use acvm::brillig_vm::brillig::{
     BinaryFieldOp, BinaryIntOp, BlackBoxOp, HeapArray, HeapVector, MemoryAddress, ValueOrArray,
 };
-use acvm::FieldElement;
+use acvm::{AcirField, FieldElement};
 use noirc_errors::debug_info::DebugInfo;
 use noirc_errors::Location;
 
@@ -19,7 +19,7 @@ use crate::utils::{dbg_print_avm_program, dbg_print_brillig_program};
 
 /// Transpile a Brillig program to AVM bytecode
 pub fn brillig_to_avm(
-    brillig_bytecode: &[BrilligOpcode],
+    brillig_bytecode: &[BrilligOpcode<FieldElement>],
     brillig_pcs_to_avm_pcs: &Vec<usize>,
 ) -> Vec<u8> {
     dbg_print_brillig_program(brillig_bytecode);
@@ -838,7 +838,7 @@ fn handle_const(
     } else {
         // We can't fit a field in an instruction. This should've been handled in Brillig.
         let field = value;
-        if !field.fits_in_u128() {
+        if field.num_bits() > 128 {
             panic!("SET: Field value doesn't fit in 128 bits, that's not supported!");
         }
         avm_instrs.extend([
@@ -1250,7 +1250,7 @@ pub fn patch_debug_info_pcs(
 ///     brillig: the Brillig program
 /// returns: an array where each index is a Brillig pc,
 ///     and each value is the corresponding AVM pc.
-pub fn map_brillig_pcs_to_avm_pcs(brillig_bytecode: &[BrilligOpcode]) -> Vec<usize> {
+pub fn map_brillig_pcs_to_avm_pcs(brillig_bytecode: &[BrilligOpcode<FieldElement>]) -> Vec<usize> {
     let mut pc_map = vec![0; brillig_bytecode.len()];
 
     pc_map[0] = 0; // first PC is always 0 as there are no instructions inserted by AVM at start

avm-transpiler/src/transpile_contract.rs

@@ -1,5 +1,6 @@
 use std::io::Read;
 
+use acvm::FieldElement;
 use base64::Engine;
 use log::info;
 use serde::{Deserialize, Serialize};
@@ -62,7 +63,7 @@ pub struct AcirContractFunctionArtifact {
         serialize_with = "Program::serialize_program_base64",
         deserialize_with = "Program::deserialize_program_base64"
     )]
-    pub bytecode: Program,
+    pub bytecode: Program<FieldElement>,
     #[serde(
         serialize_with = "ProgramDebugInfo::serialize_compressed_base64_json",
         deserialize_with = "ProgramDebugInfo::deserialize_compressed_base64_json"

avm-transpiler/src/utils.rs

@@ -1,3 +1,4 @@
+use acvm::FieldElement;
 use log::debug;
 
 use acvm::acir::brillig::Opcode as BrilligOpcode;
@@ -11,7 +12,7 @@ use crate::instructions::AvmInstruction;
 /// pointer opcode in ACIR that fetches those unconstrained functions from the main list.
 /// This function just extracts Brillig bytecode, with the assumption that the
 /// 0th unconstrained function in the full `Program` structure.
-pub fn extract_brillig_from_acir_program(program: &Program) -> &[BrilligOpcode] {
+pub fn extract_brillig_from_acir_program(program: &Program<FieldElement>) -> &[BrilligOpcode<FieldElement>] {
     assert_eq!(
         program.functions.len(),
         1,
@@ -37,7 +38,7 @@ pub fn extract_brillig_from_acir_program(program: &Program) -> &[BrilligOpcode]
 }
 
 /// Print inputs, outputs, and instructions in a Brillig program
-pub fn dbg_print_brillig_program(brillig_bytecode: &[BrilligOpcode]) {
+pub fn dbg_print_brillig_program(brillig_bytecode: &[BrilligOpcode<FieldElement>]) {
     debug!("Printing Brillig program...");
     for (i, instruction) in brillig_bytecode.iter().enumerate() {
         debug!("\tPC:{0} {1:?}", i, instruction);

noir/noir-repo/acvm-repo/acir/Cargo.toml

@@ -33,9 +33,8 @@ criterion.workspace = true
 pprof.workspace = true
 
 [features]
-default = ["bn254"]
-bn254 = ["acir_field/bn254", "brillig/bn254"]
-bls12_381 = ["acir_field/bls12_381", "brillig/bls12_381"]
+bn254 = ["acir_field/bn254"]
+bls12_381 = ["acir_field/bls12_381"]
 
 [[bench]]
 name = "serialization"

noir/noir-repo/acvm-repo/acir/benches/serialization.rs

@@ -11,8 +11,8 @@ use pprof::criterion::{Output, PProfProfiler};
 
 const SIZES: [usize; 9] = [10, 50, 100, 500, 1000, 5000, 10000, 50000, 100000];
 
-fn sample_program(num_opcodes: usize) -> Program {
-    let assert_zero_opcodes: Vec<Opcode> = (0..num_opcodes)
+fn sample_program(num_opcodes: usize) -> Program<FieldElement> {
+    let assert_zero_opcodes: Vec<Opcode<_>> = (0..num_opcodes)
         .map(|i| {
             Opcode::AssertZero(Expression {
                 mul_terms: vec![(
@@ -83,7 +83,7 @@ fn bench_deserialization(c: &mut Criterion) {
             BenchmarkId::from_parameter(size),
             &serialized_program,
             |b, program| {
-                b.iter(|| Program::deserialize_program(program));
+                b.iter(|| Program::<FieldElement>::deserialize_program(program));
             },
         );
     }
@@ -107,7 +107,7 @@ fn bench_deserialization(c: &mut Criterion) {
             |b, program| {
                 b.iter(|| {
                     let mut deserializer = serde_json::Deserializer::from_slice(program);
-                    Program::deserialize_program_base64(&mut deserializer)
+                    Program::<FieldElement>::deserialize_program_base64(&mut deserializer)
                 });
             },
         );

noir/noir-repo/acvm-repo/acir/src/circuit/brillig.rs

@@ -6,9 +6,9 @@ use serde::{Deserialize, Serialize};
 /// Inputs for the Brillig VM. These are the initial inputs
 /// that the Brillig VM will use to start.
 #[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Debug)]
-pub enum BrilligInputs {
-    Single(Expression),
-    Array(Vec<Expression>),
+pub enum BrilligInputs<F> {
+    Single(Expression<F>),
+    Array(Vec<Expression<F>>),
     MemoryArray(BlockId),
 }
 
@@ -24,6 +24,6 @@ pub enum BrilligOutputs {
 /// a full Brillig function to be executed by the Brillig VM.
 /// This is stored separately on a program and accessed through a [BrilligPointer].
 #[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Default, Debug)]
-pub struct BrilligBytecode {
-    pub bytecode: Vec<BrilligOpcode>,
+pub struct BrilligBytecode<F> {
+    pub bytecode: Vec<BrilligOpcode<F>>,
 }

noir/noir-repo/acvm-repo/acir/src/circuit/directives.rs

@@ -5,7 +5,7 @@ use serde::{Deserialize, Serialize};
 /// Directives do not apply any constraints.
 /// You can think of them as opcodes that allow one to use non-determinism
 /// In the future, this can be replaced with asm non-determinism blocks
-pub enum Directive {
+pub enum Directive<F> {
     //decomposition of a: a=\sum b[i]*radix^i where b is an array of witnesses < radix in little endian form
-    ToLeRadix { a: Expression, b: Vec<Witness>, radix: u32 },
+    ToLeRadix { a: Expression<F>, b: Vec<Witness>, radix: u32 },
 }