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The 65Org16 is a CPU core very closely related to the familiar 6502:
- with 32-bit address space (by using 16-bit bytes)
- with no specific support for 8-bit bytes
- with BCD mode not supported
- and otherwise all opcodes and addressing modes are like the NMOS 6502
- sign bit is bit 15, overflow bit is bit 14
(The idea is to get to a 32-bit address space with the least effort, and the least debate about all the possible ways to enhance 6502, which always leads to a big discussion but usually with no concrete outcome.)
This project, now seen working on FPGA, is based on Arlet Ottens' implementation of the 6502 - but other implementations could be used as a basis. Here's an index of forum discussions about it.
- there are two assemblers
- there are two emulators (with mini-assemblers)
See below for details.
From a 65Org16 base, we can take further branches, or forks, and pursue particular ideas about adding to the 6502 architecture.
The original fork and branch stays close to the NMOS 6502: other forks will extend, modify or reduce the instruction set or the architecture.
- ElEctric_EyE's fork (discussion thread) will add registers and discard BCD mode and the SED and CLD instruction.
Any variant will surely need at least an assembler, and possibly a monitor, a disassembler, and so on. At least one high level language would be nice.
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There's a fork of Mike Naberezny's py65 emulator which models the 65Org16 and includes a primitive assembler and disassembler
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There's an [in-browser emulator] (http://biged.github.com/6502js/) forked from Nick Morgan's easy6502, which also emulates the 65Org32
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Anton Treuenfels's HXA assembler family supports the 65Org16
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Andrew John Jacob's dev65 assembler has an experimental pre-release which supports the 65Org16
The core name is a tribute to Mike Naberezny's 6502.org site. Here's the original announcement thread.
Other active projects seeking to extend the 6502 architecture include
- André Fachat's 65k (announcement thread)
- Ruud Baltissen's RB6502 (announcement thread)