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mappers.h
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mappers.h
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//--------------------------------------------------------------------------------
//MAPPERS !!!
//................................................................................
//MAPPER0
mapintf_t map0_intf =
{
0, /* mapper number */
"None", /* mapper name */
NULL, /* init routine */
NULL, /* vblank callback */
NULL, /* hblank callback */
NULL, /* get state (snss) */
NULL, /* set state (snss) */
NULL, /* memory read structure */
NULL, /* memory write structure */
NULL /* external sound device */
};
//................................................................................
//MAPPER1
/* TODO: roll this into something... */
int bitcount = 0;
uint8_t latch = 0;
uint8_t regs[4];
int bank_select;
uint8_t lastreg;
void map1_write(uint32_t address, uint8_t value)
{
int regnum = (address >> 13) - 4;
if (value & 0x80)
{
regs[0] |= 0x0C;
bitcount = 0;
latch = 0;
return;
}
if (lastreg != regnum)
{
bitcount = 0;
latch = 0;
lastreg = regnum;
}
//lastreg = regnum;
latch |= ((value & 1) << bitcount++);
/* 5 bit registers */
if (5 != bitcount)
return;
regs[regnum] = latch;
value = latch;
bitcount = 0;
latch = 0;
switch (regnum)
{
case 0:
{
if (0 == (value & 2))
{
int mirror = value & 1;
ppu_mirror(mirror, mirror, mirror, mirror);
}
else
{
if (value & 1)
ppu_mirror(0, 0, 1, 1);
else
ppu_mirror(0, 1, 0, 1);
}
}
break;
case 1:
if (regs[0] & 0x10)
mmc_bankvrom(4, 0x0000, value);
else
mmc_bankvrom(8, 0x0000, value >> 1);
break;
case 2:
if (regs[0] & 0x10)
mmc_bankvrom(4, 0x1000, value);
break;
case 3:
if (mmc_getinfo()->rom_banks == 0x20)
{
bank_select = (regs[1] & 0x10) ? 0 : 0x10;
}
else if (mmc_getinfo()->rom_banks == 0x40)
{
if (regs[0] & 0x10)
bank_select = (regs[1] & 0x10) | ((regs[2] & 0x10) << 1);
else
bank_select = (regs[1] & 0x10) << 1;
}
else
{
bank_select = 0;
}
if (0 == (regs[0] & 0x08))
mmc_bankrom(32, 0x8000, ((regs[3] >> 1) + (bank_select >> 1)));
else if (regs[0] & 0x04)
mmc_bankrom(16, 0x8000, ((regs[3] & 0xF) + bank_select));
else
mmc_bankrom(16, 0xC000, ((regs[3] & 0xF) + bank_select));
default:
break;
}
}
void map1_init(void)
{
bitcount = 0;
latch = 0;
memset(regs, 0, sizeof(regs));
if (mmc_getinfo()->rom_banks == 0x20)
mmc_bankrom(16, 0xC000, 0x0F);
map1_write(0x8000, 0x80);
}
void map1_getstate(SnssMapperBlock *state);
void map1_getstate(SnssMapperBlock *state)
{
state->extraData.mapper1.registers[0] = regs[0];
state->extraData.mapper1.registers[1] = regs[1];
state->extraData.mapper1.registers[2] = regs[2];
state->extraData.mapper1.registers[3] = regs[3];
state->extraData.mapper1.latch = latch;
state->extraData.mapper1.numberOfBits = bitcount;
}
void map1_setstate(SnssMapperBlock *state);
void map1_setstate(SnssMapperBlock *state)
{
regs[1] = state->extraData.mapper1.registers[0];
regs[1] = state->extraData.mapper1.registers[1];
regs[2] = state->extraData.mapper1.registers[2];
regs[3] = state->extraData.mapper1.registers[3];
latch = state->extraData.mapper1.latch;
bitcount = state->extraData.mapper1.numberOfBits;
}
map_memwrite map1_memwrite[] =
{
{ 0x8000, 0xFFFF, map1_write },
{ -1, -1, NULL }
};
mapintf_t map1_intf =
{
1, /* mapper number */
"MMC1", /* mapper name */
map1_init, /* init routine */
NULL, /* vblank callback */
NULL, /* hblank callback */
map1_getstate, /* get state (snss) */
map1_setstate, /* set state (snss) */
NULL, /* memory read structure */
map1_memwrite, /* memory write structure */
NULL /* external sound device */
};
//................................................................................
//MAPPER2
/* mapper 2: UNROM */
void map2_write(uint32_t address, uint8_t value)
{
UNUSED(address);
mmc_bankrom(16, 0x8000, value);
}
map_memwrite map2_memwrite[] =
{
{ 0x8000, 0xFFFF, map2_write },
{ -1, -1, NULL }
};
mapintf_t map2_intf =
{
2, /* mapper number */
"UNROM", /* mapper name */
NULL, /* init routine */
NULL, /* vblank callback */
NULL, /* hblank callback */
NULL, /* get state (snss) */
NULL, /* set state (snss) */
NULL, /* memory read structure */
map2_memwrite, /* memory write structure */
NULL /* external sound device */
};
//................................................................................
//MAPPER3
/* mapper 3: CNROM */
void map3_write(uint32_t address, uint8_t value)
{
UNUSED(address);
mmc_bankvrom(8, 0x0000, value);
}
map_memwrite map3_memwrite[] =
{
{ 0x8000, 0xFFFF, map3_write },
{ -1, -1, NULL }
};
mapintf_t map3_intf =
{
3, /* mapper number */
"CNROM", /* mapper name */
NULL, /* init routine */
NULL, /* vblank callback */
NULL, /* hblank callback */
NULL, /* get state (snss) */
NULL, /* set state (snss) */
NULL, /* memory read structure */
map3_memwrite, /* memory write structure */
NULL /* external sound device */
};
//................................................................................
//MAPPER4
struct
{
int counter, latch;
bool enabled, reset;
} irq;
uint8_t reg;
uint8_t command;
uint16_t vrombase;
/* mapper 4: MMC3 */
void map4_write(uint32_t address, uint8_t value)
{
switch (address & 0xE001)
{
case 0x8000:
command = value;
vrombase = (command & 0x80) ? 0x1000 : 0x0000;
if (reg != (value & 0x40))
{
if (value & 0x40)
mmc_bankrom(8, 0x8000, (mmc_getinfo()->rom_banks * 2) - 2);
else
mmc_bankrom(8, 0xC000, (mmc_getinfo()->rom_banks * 2) - 2);
}
reg = value & 0x40;
break;
case 0x8001:
switch (command & 0x07)
{
case 0:
value &= 0xFE;
mmc_bankvrom(1, vrombase ^ 0x0000, value);
mmc_bankvrom(1, vrombase ^ 0x0400, value + 1);
break;
case 1:
value &= 0xFE;
mmc_bankvrom(1, vrombase ^ 0x0800, value);
mmc_bankvrom(1, vrombase ^ 0x0C00, value + 1);
break;
case 2:
mmc_bankvrom(1, vrombase ^ 0x1000, value);
break;
case 3:
mmc_bankvrom(1, vrombase ^ 0x1400, value);
break;
case 4:
mmc_bankvrom(1, vrombase ^ 0x1800, value);
break;
case 5:
mmc_bankvrom(1, vrombase ^ 0x1C00, value);
break;
case 6:
mmc_bankrom(8, (command & 0x40) ? 0xC000 : 0x8000, value);
break;
case 7:
mmc_bankrom(8, 0xA000, value);
break;
}
break;
case 0xA000:
/* four screen mirroring crap */
if (0 == (mmc_getinfo()->flags & ROM_FLAG_FOURSCREEN))
{
if (value & 1)
ppu_mirror(0, 0, 1, 1); /* horizontal */
else
ppu_mirror(0, 1, 0, 1); /* vertical */
}
break;
case 0xA001:
/* Save RAM enable / disable */
/* Messes up Startropics I/II if implemented -- bah */
break;
case 0xC000:
irq.latch = value;
// if (irq.reset)
// irq.counter = irq.latch;
break;
case 0xC001:
irq.reset = true;
irq.counter = irq.latch;
break;
case 0xE000:
irq.enabled = false;
// if (irq.reset)
// irq.counter = irq.latch;
break;
case 0xE001:
irq.enabled = true;
// if (irq.reset)
// irq.counter = irq.latch;
break;
default:
break;
}
if (true == irq.reset)
irq.counter = irq.latch;
}
void map4_hblank(int vblank)
{
if (vblank)
return;
if (ppu_enabled())
{
if (irq.counter >= 0)
{
irq.reset = false;
irq.counter--;
if (irq.counter < 0)
{
if (irq.enabled)
{
irq.reset = true;
nes_irq();
}
}
}
}
}
void map4_getstate(SnssMapperBlock *state);
void map4_getstate(SnssMapperBlock *state)
{
state->extraData.mapper4.irqCounter = irq.counter;
state->extraData.mapper4.irqLatchCounter = irq.latch;
state->extraData.mapper4.irqCounterEnabled = irq.enabled;
state->extraData.mapper4.last8000Write = command;
}
void map4_setstate(SnssMapperBlock *state);
void map4_setstate(SnssMapperBlock *state)
{
irq.counter = state->extraData.mapper4.irqCounter;
irq.latch = state->extraData.mapper4.irqLatchCounter;
irq.enabled = state->extraData.mapper4.irqCounterEnabled;
command = state->extraData.mapper4.last8000Write;
}
void map4_init(void)
{
irq.counter = irq.latch = 0;
irq.enabled = irq.reset = false;
reg = command = 0;
vrombase = 0x0000;
}
map_memwrite map4_memwrite[] =
{
{ 0x8000, 0xFFFF, map4_write },
{ -1, -1, NULL }
};
mapintf_t map4_intf =
{
4, /* mapper number */
"MMC3", /* mapper name */
map4_init, /* init routine */
NULL, /* vblank callback */
map4_hblank, /* hblank callback */
map4_getstate, /* get state (snss) */
map4_setstate, /* set state (snss) */
NULL, /* memory read structure */
map4_memwrite, /* memory write structure */
NULL /* external sound device */
};
//................................................................................
//MAPPER5
///mmc5_snd.c
/* TODO: encapsulate apu/mmc5 rectangle */
#define APU_OVERSAMPLE
#define APU_VOLUME_DECAY(x) ((x) -= ((x) >> 7))
const int duty_lut[4] = { 2, 4, 8, 12 };
#define MMC5_WRA0 0x5000
#define MMC5_WRA1 0x5001
#define MMC5_WRA2 0x5002
#define MMC5_WRA3 0x5003
#define MMC5_WRB0 0x5004
#define MMC5_WRB1 0x5005
#define MMC5_WRB2 0x5006
#define MMC5_WRB3 0x5007
#define MMC5_SMASK 0x5015
typedef struct mmc5rectangle_s
{
uint8_t regs[4];
bool enabled;
float accum;
int32_t freq;
int32_t output_vol;
bool fixed_envelope;
bool holdnote;
uint8_t volume;
int32_t env_phase;
int32_t env_delay;
uint8_t env_vol;
int vbl_length;
uint8_t adder;
int duty_flip;
} mmc5rectangle_t;
typedef struct mmc5dac_s
{
int32_t output;
bool enabled;
} mmc5dac_t;
struct
{
float incsize;
uint8_t mul[2];
mmc5rectangle_t rect[2];
mmc5dac_t dac;
} mmc5;
#define MMC5_RECTANGLE_OUTPUT chan->output_vol
int32_t mmc5_rectangle(mmc5rectangle_t *chan);
int32_t mmc5_rectangle(mmc5rectangle_t *chan)
{
int32_t output;
#ifdef APU_OVERSAMPLE
int num_times;
int32_t total;
#endif /* APU_OVERSAMPLE */
/* reg0: 0-3=volume, 4=envelope, 5=hold, 6-7=duty cycle
** reg1: 0-2=sweep shifts, 3=sweep inc/dec, 4-6=sweep length, 7=sweep on
** reg2: 8 bits of freq
** reg3: 0-2=high freq, 7-4=vbl length counter
*/
APU_VOLUME_DECAY(chan->output_vol);
if (false == chan->enabled || 0 == chan->vbl_length)
return MMC5_RECTANGLE_OUTPUT;
/* vbl length counter */
if (false == chan->holdnote)
chan->vbl_length--;
/* envelope decay at a rate of (env_delay + 1) / 240 secs */
chan->env_phase -= 4; /* 240/60 */
while (chan->env_phase < 0)
{
chan->env_phase += chan->env_delay;
if (chan->holdnote)
chan->env_vol = (chan->env_vol + 1) & 0x0F;
else if (chan->env_vol < 0x0F)
chan->env_vol++;
}
if (chan->freq < 4)
return MMC5_RECTANGLE_OUTPUT;
chan->accum -= mmc5.incsize; /* # of cycles per sample */
if (chan->accum >= 0)
return MMC5_RECTANGLE_OUTPUT;
#ifdef APU_OVERSAMPLE
num_times = total = 0;
if (chan->fixed_envelope)
output = chan->volume << 8; /* fixed volume */
else
output = (chan->env_vol ^ 0x0F) << 8;
#endif
while (chan->accum < 0)
{
chan->accum += chan->freq;
chan->adder = (chan->adder + 1) & 0x0F;
#ifdef APU_OVERSAMPLE
if (chan->adder < chan->duty_flip)
total += output;
else
total -= output;
num_times++;
#endif
}
#ifdef APU_OVERSAMPLE
chan->output_vol = total / num_times;
#else
if (chan->fixed_envelope)
output = chan->volume << 8; /* fixed volume */
else
output = (chan->env_vol ^ 0x0F) << 8;
if (0 == chan->adder)
chan->output_vol = output;
else if (chan->adder == chan->duty_flip)
chan->output_vol = -output;
#endif
return MMC5_RECTANGLE_OUTPUT;
}
uint8_t mmc5_read(uint32_t address)
{
uint32_t retval;
retval = (uint32_t) (mmc5.mul[0] * mmc5.mul[1]);
switch (address)
{
case 0x5205:
return (uint8_t) retval;
case 0x5206:
return (uint8_t) (retval >> 8);
default:
return 0xFF;
}
}
/* mix vrcvi sound channels together */
int32_t mmc5_process(void)
{
int32_t accum;
accum = mmc5_rectangle(&mmc5.rect[0]);
accum += mmc5_rectangle(&mmc5.rect[1]);
if (mmc5.dac.enabled)
accum += mmc5.dac.output;
return accum;
}
/* write to registers */
void mmc5_write(uint32_t address, uint8_t value)
{
int chan;
switch (address)
{
/* rectangles */
case MMC5_WRA0:
case MMC5_WRB0:
chan = (address & 4) ? 1 : 0;
mmc5.rect[chan].regs[0] = value;
mmc5.rect[chan].volume = value & 0x0F;
mmc5.rect[chan].env_delay = decay_lut[value & 0x0F];
mmc5.rect[chan].holdnote = (value & 0x20) ? true : false;
mmc5.rect[chan].fixed_envelope = (value & 0x10) ? true : false;
mmc5.rect[chan].duty_flip = duty_lut[value >> 6];
break;
case MMC5_WRA1:
case MMC5_WRB1:
break;
case MMC5_WRA2:
case MMC5_WRB2:
chan = (address & 4) ? 1 : 0;
mmc5.rect[chan].regs[2] = value;
if (mmc5.rect[chan].enabled)
mmc5.rect[chan].freq = (((mmc5.rect[chan].regs[3] & 7) << 8) + value) + 1;
break;
case MMC5_WRA3:
case MMC5_WRB3:
chan = (address & 4) ? 1 : 0;
mmc5.rect[chan].regs[3] = value;
if (mmc5.rect[chan].enabled)
{
mmc5.rect[chan].vbl_length = vbl_lut[value >> 3];
mmc5.rect[chan].env_vol = 0;
mmc5.rect[chan].freq = (((value & 7) << 8) + mmc5.rect[chan].regs[2]) + 1;
mmc5.rect[chan].adder = 0;
}
break;
case MMC5_SMASK:
if (value & 0x01)
{
mmc5.rect[0].enabled = true;
}
else
{
mmc5.rect[0].enabled = false;
mmc5.rect[0].vbl_length = 0;
}
if (value & 0x02)
{
mmc5.rect[1].enabled = true;
}
else
{
mmc5.rect[1].enabled = false;
mmc5.rect[1].vbl_length = 0;
}
break;
case 0x5010:
if (value & 0x01)
mmc5.dac.enabled = true;
else
mmc5.dac.enabled = false;
break;
case 0x5011:
mmc5.dac.output = (value ^ 0x80) << 8;
break;
case 0x5205:
mmc5.mul[0] = value;
break;
case 0x5206:
mmc5.mul[1] = value;
break;
case 0x5114:
case 0x5115:
/* ???? */
break;
default:
break;
}
}
/* reset state of vrcvi sound channels */
void mmc5_reset(void)
{
int i;
apu_t apu;
/* get the phase period from the apu */
apu_getcontext(&apu);
mmc5.incsize = apu.cycle_rate;
for (i = 0x5000; i < 0x5008; i++)
mmc5_write(i, 0);
mmc5_write(0x5010, 0);
mmc5_write(0x5011, 0);
}
int mmc5_init(void)
{
int i, num_samples;
apu_t apu;
apu_getcontext(&apu);
num_samples = apu.num_samples;
/* lut used for enveloping and frequency sweeps */
for (i = 0; i < 16; i++)
decay_lut[i] = num_samples * (i + 1);
/* used for note length, based on vblanks and size of audio buffer */
for (i = 0; i < 32; i++)
vbl_lut[i] = vbl_length[i] * num_samples;
return 0;
}
apu_memread mmc5_memread[] =
{
{ 0x5205, 0x5206, mmc5_read },
{ -1, -1, NULL }
};
apu_memwrite mmc5_memwrite[] =
{
{ 0x5000, 0x5015, mmc5_write },
{ 0x5114, 0x5115, mmc5_write },
{ 0x5205, 0x5206, mmc5_write },
{ -1, -1, NULL }
};
apuext_t mmc5_ext =
{
mmc5_init,
NULL, /* no shutdown */
mmc5_reset,
mmc5_process,
mmc5_memread,
mmc5_memwrite
};
///////////////////////////////////////
///
/*
struct
{
int counter, enabled;
int reset, latch;
} irq;*/
/* MMC5 - Castlevania III, etc */
void map5_hblank(int vblank)
{
UNUSED(vblank);
if (irq.counter == nes_getcontextptr()->scanline)
{
if (true == irq.enabled)
{
nes_irq();
irq.reset = true;
}
//else
// irq.reset = false;
irq.counter = irq.latch;
}
}
void map5_write(uint32_t address, uint8_t value)
{
int page_size = 8;
/* ex-ram memory-- bleh! */
if (address >= 0x5C00 && address <= 0x5FFF)
return;
switch (address)
{
case 0x5100:
/* PRG page size setting */
/* 0:32k 1:16k 2,3:8k */
switch (value & 3)
{
case 0:
page_size = 32;
break;
case 1:
page_size = 16;
break;
case 2:
case 3:
page_size = 8;
break;
}
break;
case 0x5101:
/* CHR page size setting */
/* 0:8k 1:4k 2:2k 3:1k */
break;
case 0x5104:
/* GFX mode setting */
/*
00:split mode
01:split & exgraffix
10:ex-ram
11:exram + write protect
*/
break;
case 0x5105:
/* TODO: exram needs to fill in nametables 2-3 */
ppu_mirror(value & 3, (value >> 2) & 3, (value >> 4) & 3, value >> 6);
break;
case 0x5106:
case 0x5107:
/* ex-ram fill mode stuff */
break;
case 0x5113:
/* ram page for $6000-7FFF? bit 2*/
break;
case 0x5114:
mmc_bankrom(8, 0x8000, value);
//if (page_size == 8)
// mmc_bankrom(8, 0x8000, value);
break;
case 0x5115:
mmc_bankrom(8, 0x8000, value);
mmc_bankrom(8, 0xA000, value + 1);
//if (page_size == 8)
// mmc_bankrom(8, 0xA000, value);
//else if (page_size == 16)
// mmc_bankrom(16, 0x8000, value >> 1);
//mmc_bankrom(16, 0x8000, value & 0xFE);
break;
case 0x5116:
mmc_bankrom(8, 0xC000, value);
//if (page_size == 8)
// mmc_bankrom(8, 0xC000, value);
break;
case 0x5117:
//if (page_size == 8)
// mmc_bankrom(8, 0xE000, value);
//else if (page_size == 16)
// mmc_bankrom(16, 0xC000, value >> 1);
//mmc_bankrom(16, 0xC000, value & 0xFE);
//else if (page_size == 32)
// mmc_bankrom(32, 0x8000, value >> 2);
//mmc_bankrom(32, 0x8000, value & 0xFC);
break;
case 0x5120:
mmc_bankvrom(1, 0x0000, value);
break;
case 0x5121:
mmc_bankvrom(1, 0x0400, value);
break;
case 0x5122:
mmc_bankvrom(1, 0x0800, value);
break;
case 0x5123:
mmc_bankvrom(1, 0x0C00, value);
break;
case 0x5124:
case 0x5125:
case 0x5126:
case 0x5127:
/* more VROM shit? */
break;
case 0x5128:
mmc_bankvrom(1, 0x1000, value);
break;
case 0x5129:
mmc_bankvrom(1, 0x1400, value);
break;
case 0x512A:
mmc_bankvrom(1, 0x1800, value);
break;
case 0x512B:
mmc_bankvrom(1, 0x1C00, value);
break;
case 0x5203:
irq.counter = value;
irq.latch = value;
// irq.reset = false;
break;
case 0x5204:
irq.enabled = (value & 0x80) ? true : false;
// irq.reset = false;
break;
default:
break;
}
}
uint8_t map5_read(uint32_t address)
{
/* Castlevania 3 IRQ counter */
if (address == 0x5204)
{
/* if reset == 1, we've hit scanline */
return (irq.reset ? 0x40 : 0x00);
}
else
{
return 0xFF;
}
}
void map5_init(void)
{
mmc_bankrom(8, 0x8000, MMC_LASTBANK);
mmc_bankrom(8, 0xA000, MMC_LASTBANK);
mmc_bankrom(8, 0xC000, MMC_LASTBANK);
mmc_bankrom(8, 0xE000, MMC_LASTBANK);
irq.counter = irq.enabled = 0;
irq.reset = irq.latch = 0;
}
/* incomplete SNSS definition */
void map5_getstate(SnssMapperBlock *state);
void map5_getstate(SnssMapperBlock *state)
{
state->extraData.mapper5.dummy = 0;
}
void map5_setstate(SnssMapperBlock *state);
void map5_setstate(SnssMapperBlock *state)
{
UNUSED(state);
}
map_memwrite map5_memwrite[] =
{
/* $5000 - $5015 handled by sound */
{ 0x5016, 0x5FFF, map5_write },
{ 0x8000, 0xFFFF, map5_write },
{ -1, -1, NULL }
};
map_memread map5_memread[] =
{
{ 0x5204, 0x5204, map5_read },
{ -1, -1, NULL }
};
mapintf_t map5_intf =
{
5, /* mapper number */
"MMC5", /* mapper name */
map5_init, /* init routine */
NULL, /* vblank callback */
map5_hblank, /* hblank callback */
map5_getstate, /* get state (snss) */
map5_setstate, /* set state (snss) */
map5_memread, /* memory read structure */
map5_memwrite, /* memory write structure */
&mmc5_ext /* external sound device */
};
//................................................................................
//MAPPER7
/* mapper 7: AOROM */
void map7_write(uint32_t address, uint8_t value)
{
int mirror;