"A High-performance packet processing framework for heterogeneous processors," EuroSys 2015 paper
- The IDS source code is not available to the public, as it contains a derivation from industry-transferred code from Kargus.
- You could refer to other open-source code, such as a GPU implementation of the Aho-Corasick algorithm in Snap.
- We used Intel DPDK v1.7 for the EuroSys 2015 paper, but have now upgraded to v2.0+.
- 80-Gbps packet processing with modular programming interface similar to Click.
- GPU offloading to boost complex computations such as IPsec encryption
- Automatic CPU/GPU load balancing to maximize the overall throughput
- Full datablock implementation
- Base implementation is done but there remains room for performance optimization
- Decreasing GPU latency
- Optimization for consequent offloadable modules: merge two separate offload-tasks into one
- "Adaptive" batching
- OpenCL engine (primarily for Intel Xeon Phi)
- (Semi-)automated conversion of existing Click elements to NBA elements