Fix buffer in link layer write

[cospan]

After exercising this core on an FPGA we observed that the back pressure from the hard drives revealed some data loss on the link layer. A work around was implemented, it was a small buffer that would absorb the data transients. This is ugly and hacky and needs to be fixed correctly.

The area in the '/nysa-sata/rtl/link/sata_link_layer_read.v' can be found on line 228 and is related to these registers:

assign              d0_buf                    = bump_buffer[0];                                                                         |            if (data_scrambler_en) begin                                                                                                
assign              d1_buf                    = bump_buffer[1];                                                                         |              prev_data   <=  descr_dout;                                                                                               
assign              d2_buf                    = bump_buffer[2];                                                                         |            end                                                                                                                         
assign              d3_buf                    = bump_buffer[3]; 

The first milestone should be to expose the bugs in a consistent way.

[straycat95]

I find it too ,but how to fix it ?