i#1569 AArch64: Follow-up to 428b896: Use opndset for ADR and ADRP. (#…

…2516) This is neater than hacking the potentially general-purpose formalism to treat "adr" and "adrp" differently and is also more consistent with how branch instructions are handled.
DynamoRIO · Jul 10, 2017 · aec4977 · aec4977
1 parent bc483ac
commit aec4977
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Showing 5 changed files with 241 additions and 318 deletions.
diff --git a/core/arch/aarch64/codec.c b/core/arch/aarch64/codec.c
@@ -843,36 +843,6 @@ encode_opnd_wxnp(bool is_x, int plus, int pos, opnd_t opnd, OUT uint *enc_out)
  * previous section.
  */
 
-/* adr: operand of ADR */
-
-static inline bool
-decode_opnd_adr(uint enc, int opcode, byte *pc, OUT opnd_t *opnd)
-{
-    return decode_opnd_adr_page(0, enc, pc, opnd);
-}
-
-static inline bool
-encode_opnd_adr(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_out,
-                instr_t *instr)
-{
-    return encode_opnd_adr_page(0, pc, opnd, enc_out, instr);
-}
-
-/* adrp: operand of ADRP */
-
-static inline bool
-decode_opnd_adrp(uint enc, int opcode, byte *pc, OUT opnd_t *opnd)
-{
-    return decode_opnd_adr_page(12, enc, pc, opnd);
-}
-
-static inline bool
-encode_opnd_adrp(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_out,
-                 instr_t *instr)
-{
-    return encode_opnd_adr_page(12, pc, opnd, enc_out, instr);
-}
-
 /* b0: B register at bit position 0 */
 
 static inline bool
@@ -2345,6 +2315,35 @@ encode_opnd_x5sp(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_out)
  * Currently all branch instructions are handled in this way.
  */
 
+/* adr: used for ADR and ADRP */
+
+static inline bool
+decode_opnds_adr(uint enc, dcontext_t *dcontext, byte *pc, instr_t *instr, int opcode)
+{
+    opnd_t opnd;
+    if (!decode_opnd_adr_page(opcode == OP_adrp ? 12 : 0, enc, pc, &opnd))
+        return false;
+    instr_set_opcode(instr, opcode);
+    instr_set_num_opnds(dcontext, instr, 1, 1);
+    instr_set_dst(instr, 0, opnd_create_reg(decode_reg(extract_uint(enc, 0, 5),
+                                                       true, false)));
+    instr_set_src(instr, 0, opnd);
+    return true;
+}
+
+static inline uint
+encode_opnds_adr(byte *pc, instr_t *instr, uint enc)
+{
+    int opcode = instr_get_opcode(instr);
+    uint rd, adr;
+    if (instr_num_dsts(instr) == 1 && instr_num_srcs(instr) == 1 &&
+        encode_opnd_adr_page(opcode == OP_adrp ? 12 : 0,
+                             pc, instr_get_src(instr, 0), &adr, instr) &&
+        encode_opnd_wxn(true, false, 0, instr_get_dst(instr, 0), &rd))
+        return (enc | adr | rd);
+    return ENCFAIL;
+}
+
 /* b: used for B and BL */
 
 static inline bool

diff --git a/core/arch/aarch64/codec.py b/core/arch/aarch64/codec.py
@@ -124,14 +124,6 @@ def gen(c, pats, depth):
     c.append('}')
     return '\n'.join(c) + '\n'
 
-
-def maybe_instr(opnd):
-    if opnd in ('adr', 'adrp'):
-        return ', instr'
-    else:
-        return ''
-
-
 def generate_encoder(patterns, opndsgen, opndtypes):
     c = []
     for name in sorted(opndsgen):
@@ -152,11 +144,11 @@ def generate_encoder(patterns, opndsgen, opndtypes):
             tests = (['instr_num_dsts(instr) == %d && instr_num_srcs(instr) == %d' %
                       (len(dsts), len(srcs))] +
                      ['encode_opnd_%s(enc & 0x%08x, opcode, '
-                      'pc, instr_get_dst(instr, %d), &dst%d%s)' %
-                      (dsts[i], f | opndtypes[dsts[i]], i, i, maybe_instr(dsts[i])) for i in range(len(dsts))] +
+                      'pc, instr_get_dst(instr, %d), &dst%d)' %
+                      (dsts[i], f | opndtypes[dsts[i]], i, i) for i in range(len(dsts))] +
                      ['encode_opnd_%s(enc & 0x%08x, opcode, '
-                      'pc, instr_get_src(instr, %d), &src%d%s)' %
-                      (srcs[i], f | opndtypes[srcs[i]], i, i, maybe_instr(srcs[i])) for i in range(len(srcs))])
+                      'pc, instr_get_src(instr, %d), &src%d)' %
+                      (srcs[i], f | opndtypes[srcs[i]], i, i) for i in range(len(srcs))])
             tests2 = (['dst%d == (enc & 0x%08x)' % (i, opndtypes[dsts[i]])
                        for i in range(len(dsts))] +
                       ['src%d == (enc & 0x%08x)' % (i, opndtypes[srcs[i]])

diff --git a/core/arch/aarch64/codec.txt b/core/arch/aarch64/codec.txt
@@ -135,17 +135,13 @@
 -x-----------------xx-----------  index1     # index of H subreg in Q: 0-7
 -x-----------------xxx----------  index0     # index of B subreg in Q: 0-15
 -x---------xxxxx----------------  x16imm     # computes immed from 30 and 15:12
--xx-----xxxxxxxxxxxxxxxxxxx-----  adr        # operand of ADR
--xx-----xxxxxxxxxxxxxxxxxxx-----  adrp       # operand of ADRP
 x--------------------------xxxxx  wx0        # W/X register (or WZR/XZR)
 x--------------------------xxxxx  wx0sp      # W/X register or WSP/XSP
 x---------------------xxxxx-----  wx5        # W/X register (or WZR/XZR)
 x---------------------xxxxx-----  wx5sp      # W/X register or WSP/XSP
 x----------------xxxxx----------  wx10       # W/X register (or WZR/XZR)
 x----------xxxxx----------------  wx16       # W/X register (or WZR/XZR)
 
-# Note: The encoders for adr and adrp take the current instruction as argument
-#       in order to support calculating offsets for instruction operands.
 ################################################################################
 # Instruction patterns
 
@@ -167,8 +163,8 @@ x----------xxxxx----------------  wx16       # W/X register (or WZR/XZR)
 
 ## PC-relative addressing
 
-0xx10000xxxxxxxxxxxxxxxxxxxxxxxx  adr    x0 : adr
-1xx10000xxxxxxxxxxxxxxxxxxxxxxxx  adrp   x0 : adrp
+0xx10000xxxxxxxxxxxxxxxxxxxxxxxx  adr    adr
+1xx10000xxxxxxxxxxxxxxxxxxxxxxxx  adrp   adr
 
 ## Add/subtract (immediate)