i#5475 Add FEATURE_ detection for AArch64 #5491
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This patch reads from the ID_AA64ISAR0_EL1 features register and sets the following if supported: FEATURE_AES FEATURE_PMULL FEATURE_SHA1 FEATURE_SHA256 FEATURE_SHA512 FEATURE_CRC32 FEATURE_LSE FEATURE_RDM FEATURE_SM3 FEATURE_SM4 FEATURE_DotProd FEATURE_FHM FEATURE_FlagM2 FEATURE_RNG FEATURE_SHA3 FEATURE_FlagM Example output in logfile: - - - snip Processor features: ID_AA64ISAR0_EL1 = 0x0000000000011120 Processor has FEATURE_AES Processor has FEATURE_PMULL Processor has FEATURE_SHA1 Processor has FEATURE_SHA256 Processor has FEATURE_CRC32 - - - snip ID_AA64ISAR1_EL1 and ID_AA64PFR0_EL1 are also read. The features for these will be implemented in the next patch. Issues: #5474, #1569
AssadHashmi
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derekbruening
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May 16, 2022
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Turns out this broke our internal build which sets |
AssadHashmi
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Jul 11, 2022
This patch implements the codec side of the AArch64 FEATURE_ support patch, PR #5491. A feature name field is added to each opcode in codec_*.txt files which is used to generate feature checks in the encoder, e.g. switch (instr->opcode) { case OP_cas: # if !defined(DR_HOST_NOT_TARGET) && !defined(STANDALONE_DECODER) if (!proc_has_feature(FEATURE_LSE)) return ENCFAIL; # endif enc = encode_opndsgen_08a07c00_001f03ff(pc, instr,..., di); if (enc != ENCFAIL) return enc; Issues: #5475, #1569, #2626
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This patch reads from the ID_AA64ISAR0_EL1 features register and sets
the following if supported:
FEATURE_AES FEATURE_PMULL FEATURE_SHA1 FEATURE_SHA256
FEATURE_SHA512 FEATURE_CRC32 FEATURE_LSE FEATURE_RDM
FEATURE_SM3 FEATURE_SM4 FEATURE_DotProd FEATURE_FHM
FEATURE_FlagM2 FEATURE_RNG FEATURE_SHA3 FEATURE_FlagM
Example output in logfile:
Processor features:
ID_AA64ISAR0_EL1 = 0x0000000000011120
Processor has FEATURE_AES
Processor has FEATURE_PMULL
Processor has FEATURE_SHA1
Processor has FEATURE_SHA256
Processor has FEATURE_CRC32
ID_AA64ISAR1_EL1 and ID_AA64PFR0_EL1 are also read. The features for
these will be implemented in the next patch.
Issues: #5475, #1569