DigitalLockFPGA (GitHub has the .txt(s) of verilog module drafts)

• 7 segment LED Display (converted binary password inputs into visualizations on the LED screen)
• allowed for input of HEXADECIMAL characters: {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F}
• system mode would start at unlocked and ask for user to create a password
• with a pushbutton, user could transfer between password input, locked, unlocked, password change modes

Project Originally For: BU EC311 Logic Design