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This work well on early version of the motherboard cause the motherboard had the logic to bypass that problem.
Now with standards and on the GCM V5.0, the motheboard stop doing that and wait for pulses (this is correct) but the logic on the processor isn't valid anymore.
The text was updated successfully, but these errors were encountered:
* Apply new symbol for XC2C256-VQ100 #5
* Set new date and 5.1
* Replacing 74HC165 with 74HC166, and add SPI_CFG_DS #4
* Replace some gates with a 74AHC1G02 to fix the pulse problem #3
* Go next only if SRCVALUE, (simple instruction)
* Remove weird ghost bus in register
* Small cleaning in fileRegister
* Go next only if SRCVALUE, (complex instruction) #8
adding 74AHC1G08
* Better decoupling #6
* Component association (#7)
* netlist
* Updated BOM for V5.1
* Routing, cleaning first pass
* bit of pcb cleaning
* SolderMaskClearance to 0
* Schematics to pdf
* PCB files in pdf
* exporting Gerbert files
* new 3d images
* Update README.md
* Modifying CHANGELOG file
* Update README.md
This work well on early version of the motherboard cause the motherboard had the logic to bypass that problem.
Now with standards and on the GCM V5.0, the motheboard stop doing that and wait for pulses (this is correct) but the logic on the processor isn't valid anymore.
The text was updated successfully, but these errors were encountered: