GitHub - MaxwellSiyuan/Mobile-Charger: Mobile Charger project using Verilog in Xilinx Vivado targeting the Basys3 FPGA Board

This is a moblie charger project on FPGA. The development platform is Vivado using programming language of Verilog.

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
MobileCharger.cache/wt		MobileCharger.cache/wt
MobileCharger.hw		MobileCharger.hw
MobileCharger.ip_user_files		MobileCharger.ip_user_files
MobileCharger.runs		MobileCharger.runs
MobileCharger.sim/sim_1/synth/timing		MobileCharger.sim/sim_1/synth/timing
MobileCharger.srcs		MobileCharger.srcs
MobileCharger.xpr		MobileCharger.xpr
README.md		README.md
vivado.jou		vivado.jou
vivado.log		vivado.log
vivado_2812.backup.jou		vivado_2812.backup.jou
vivado_2812.backup.log		vivado_2812.backup.log
vivado_4008.backup.jou		vivado_4008.backup.jou
vivado_4008.backup.log		vivado_4008.backup.log
vivado_4492.backup.jou		vivado_4492.backup.jou
vivado_4492.backup.log		vivado_4492.backup.log
vivado_4968.backup.jou		vivado_4968.backup.jou
vivado_4968.backup.log		vivado_4968.backup.log
vivado_6264.backup.jou		vivado_6264.backup.jou
vivado_6264.backup.log		vivado_6264.backup.log
vivado_pid2860.zip		vivado_pid2860.zip

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