Merge pull request #2 from OnionIoT/Omega2-Pro

changed gpio2_mode config register to set eth port0 led as LED by default
OnionIoT · Feb 26, 2019 · 91a84cf · 91a84cf
2 parents c29bcc2 + 5811acc
commit 91a84cf
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Showing 3 changed files with 21 additions and 14 deletions.
diff --git a/drivers/msdc/ts_msdc.c b/drivers/msdc/ts_msdc.c
@@ -1870,6 +1870,7 @@ int ralink_msdc_command(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
     MSDC_CLR_BIT32(RALINK_SYSCTL_BASE+0x60, 0x1 << 18);
 #elif defined (MT7628_FPGA_BOARD) || defined (MT7628_ASIC_BOARD)
     MSDC_SET_BIT32(0xb000003c, 0x1e << 16); // TODO: maybe omitted when RAether already toggle AGPIO_CFG
+    // setting EPHY_P0_DIS to enabled (0b0) and EPHY_GPIO_AIO_EN to Digital Pad (0b1)
     MSDC_CLR_BIT32(RALINK_SYSCTL_BASE+0x60, 0x3 << 10);
 #if defined (EMMC_8BIT)
     MSDC_SET_BIT32(RALINK_SYSCTL_BASE+0x60, 0x3 << 30);

diff --git a/drivers/rt2880_eth.c b/drivers/rt2880_eth.c
@@ -2132,8 +2132,8 @@ void rt305x_esw_init(void)
 	}
 #elif defined (MT7628_ASIC_BOARD)
 /*TODO: Init MT7628 ASIC PHY HERE*/
-	i = RALINK_REG(RT2880_AGPIOCFG_REG);
-	i = i & ~(MT7628_EPHY_EN);
+	i = RALINK_REG(RT2880_AGPIOCFG_REG); // AGPIO_CFG register
+	i = i & ~(MT7628_EPHY_EN);   // setting EPHY_P0_DIS to disabled (0b1) and EPHY_GPIO_AIO_EN to Digital Pad (0b1)
 	RALINK_REG(RT2880_AGPIOCFG_REG) = i;
 
 	printf("Resetting MT7628 PHY.\n");
@@ -2143,9 +2143,11 @@ void rt305x_esw_init(void)
 	RALINK_REG(RT2880_RSTCTRL_REG) = i;
 	i = i & ~(RSTCTRL_EPHY_RST);
 	RALINK_REG(RT2880_RSTCTRL_REG) = i;
-	i = RALINK_REG(RALINK_SYSCTL_BASE + 0x64);
-	i &= 0xf003f003;
-	RALINK_REG(RALINK_SYSCTL_BASE + 0x64) = i;
+
+	i = RALINK_REG(RALINK_SYSCTL_BASE + 0x64); // GPIO2_MODE register
+	i &= 0xf003f003; // WLED_AN_MODE = reserved, P0_LED_AN_MODE = EPHY P0 LED  // lazar@onion.io: potentiall change this??
+	RALINK_REG(RALINK_SYSCTL_BASE + 0x64) = i;  // GPIO2_MODE register
+
 
 	udelay(5000);
 	mt7628_ephy_init();

diff --git a/lib_mips/board.c b/lib_mips/board.c
@@ -1421,7 +1421,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	Init_System_Mode(); /*  Get CPU rate */
 
 #if defined(MT7628_ASIC_BOARD)	/* Enable WLED share pin */
-	RALINK_REG(RALINK_SYSCTL_BASE+0x3C)|= (1<<8);
+  // lazar@onion.io: this might be changing ephy p1-p4 to analog momentarily
+	RALINK_REG(RALINK_SYSCTL_BASE+0x3C)|= (1<<8);  // AGPIO_CFG register
 	RALINK_REG(RALINK_SYSCTL_BASE+0x64)&= ~((0x3<<16)|(0x3));
 #endif
 #if defined(RT3052_ASIC_BOARD) || defined(RT3352_ASIC_BOARD) || defined(RT5350_ASIC_BOARD)
@@ -1969,7 +1970,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
     defined (RT3352_ASIC_BOARD) || defined (RT3352_FPGA_BOARD)  || \
     defined (RT5350_ASIC_BOARD) || defined (RT5350_FPGA_BOARD)  || \
     defined (MT7628_ASIC_BOARD) || defined (MT7628_FPGA_BOARD)
-	rt305x_esw_init();
+	rt305x_esw_init();   // lazar@onion.io: ethernet init
 #elif defined (RT6855_ASIC_BOARD) || defined (RT6855_FPGA_BOARD) || \
       defined (MT7620_ASIC_BOARD) || defined (MT7620_FPGA_BOARD)
 	rt_gsw_init();
@@ -2002,7 +2003,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	    s = getenv ("bootdelay");
 	    timer1 = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
 	}
-	gpio_init();
+	gpio_init(); // lazar@onion.io: gpio init
 
     // zh@onion.io
     // made message shorter
@@ -2988,16 +2989,19 @@ void disable_pcie(void)
 	RALINK_REG(RT2880_CLKCFG1_REG) = val;
 #endif
 }
+
 //added by mango 20160120
 //wled_n GPIO44 WLAN_AN_MODE 2b01
 //WDT GPIO38 WDT_MODE 1b1
+//modified by Onion 20181128
+//GPIO43 P0_LED_AN_MODE 2b01 - GPIO (not ephy activity LED)
 void gpio_init(void)
 {
 	u32 val;
 	printf( "Initializing MT7688 GPIO system.\n" );
-	//set gpio2_mode 1:0=2b01 wled,p1,p2,p3,p4 is gpio.p0 is ephy
-	val = 0x551;
-	RALINK_REG(RT2880_SYS_CNTL_BASE+0x64)=val;
+	//set gpio2_mode 1:0=2b01 wled,p0,p1,p2,p3,p4 as gpio
+	val = 0x555;
+	RALINK_REG(RT2880_SYS_CNTL_BASE+0x64)=val; // GPIO2_MODE register
 	RALINK_REG(0xb0000644)=0x0f<<7;
 	//gpio44 output gpio_ctrl_1 bit3=1
 	val=RALINK_REG(RT2880_REG_PIODIR+0x04);
@@ -3022,13 +3026,13 @@ void gpio_init(void)
   val=RALINK_REG(RT2880_REG_PIODATA);
   val|=1<<11;
   RALINK_REG(RT2880_REG_PIODATA) = val; // GPIO 11 High
-  
+
   //jeffzhou@onion.io
   //adding for read wifi MAC address.
   unsigned char macbuf[6];
 	raspi_read(macbuf, CFG_FACTORY_ADDR - CFG_FLASH_BASE + 0x04, 6);
 	printf("wifi mac address = %02X%02X%02X%02X%02X%02X.\n",
-			macbuf[0],macbuf[1],macbuf[2],macbuf[3],macbuf[4],macbuf[5]);	
+      macbuf[0],macbuf[1],macbuf[2],macbuf[3],macbuf[4],macbuf[5]);
 }
 
 void led_on( void )
@@ -3372,7 +3376,7 @@ void gpio_test( int vtest ) //Test Omega2 GPIO
 		udelay(300000);
 		RALINK_REG(0xb0000624)=0x0;
 		udelay(200000);
-		
+
 		#if 0 //use for button
 		RALINK_REG(0xb0000624)=0x40;		//G38
 		udelay(300000);