IFU: fix the bug of postponing MMIO instruction fetch strategy

[my-mayfly]

No description provided.

[XiangShanRobot]

[Generated by IPC robot]
commit: 0bec454

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
0bec454	1.815	0.453	2.060	1.182	2.953	2.504	2.291	0.930	1.403	1.319	3.426	2.660	2.397	2.940

master branch:

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
202ef6b	1.815	0.448	2.060	1.182	2.953	2.504	2.291	0.930	1.403	1.319	3.426	2.660	2.397	2.940
4c46d75	1.815		2.060	1.182	2.953	2.504		0.930	1.403	1.319	3.426		2.397	2.940
807e518	1.815	0.448	2.060	1.182	2.953	2.504	2.291	0.930	1.403	1.319	3.426	2.660	2.397	2.940
5820cff	1.815		2.060	1.182	2.953	2.504		0.930	1.403	1.319	3.426		2.397	2.940
8daac0b
c41a9f7
31fae68	1.815	0.448	2.060	1.182	2.953	2.504	2.291	0.930	1.403	1.319	3.426	2.660	2.397	2.940
071c63e	1.815	0.448	2.060	1.182	2.953	2.504	2.291	0.930	1.403	1.319	3.426	2.660	2.397	2.940
6b742a1	1.821	0.448	2.054	1.173	2.950	2.500	2.291	0.923	1.376	1.265	3.448	2.667	2.398	2.940
dc30dd9	1.821	0.448	2.054	1.173	2.950	2.500	2.291	0.923	1.376	1.265	3.448	2.667	2.398	2.940

[cebarobot]

This patch also fixes the warning of "out of flash bound" in Hypervisor extention test.

Hypervisor Xvisor (HS/S-mode software) use a virtual address base on 0x10000000, which in physical address is MMIO flash. Because of prefetch or something else, when returning to S/U/VS/VU mode from M mode (such as openSBI), frontend would try to access Xvisor's S-mode virtual address, 0x10054321 for example. However, it is still M-mode and address translation is not enabled, so frontend is actually accessing physical address 0x10054321. 0x10054321 is out of flash size and difftest will always complain about this.