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I'm working on KL10-PV hardware emulation/FPGA #45

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alanmimms opened this issue Sep 22, 2023 · 10 comments
Open

I'm working on KL10-PV hardware emulation/FPGA #45

alanmimms opened this issue Sep 22, 2023 · 10 comments

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@alanmimms
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alanmimms commented Sep 22, 2023

Hello. I have been "hobby" working on a KL10-PV emulation of the real hardware in Verilog for a while now. I hope someday to boot TOPS-20 on this in simulation and then make it run in an FPGA. I'm a software guy who knows something about hardware as well.

I forgot to mention the repository for this project, which is called "Jurassic-20", is at https://github.com/alanmimms/jurassic-20.

@larsbrinkhoff
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I for one think this is awesome! May I put in a word for the MiSTer platform? I think I persuaded @jfcl to consider it for his https://github.com/KS10FPGA/KS10FPGA

Just the other day I was thinking about making a KL10-style panel for the PiDP-11. I dare say it would make a nice combination with a KL10 FPGA.

CC @eswenson1

@alanmimms
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alanmimms commented Sep 22, 2023 via email

@larsbrinkhoff
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I added some interesting files here: https://github.com/PDP-10/kldcp

@david-moon
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david-moon commented Sep 22, 2023 via email

@larsbrinkhoff
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As far as i know, no relation at all. I believe Conroy's PDP-10/X is close to a KA10 - with some changes - but microcoded, and only runs ITS.

@alanmimms
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alanmimms commented Sep 23, 2023

How does this relate to [ http://www.fpgaretrocomputing.org/pdp10x/ | http://www.fpgaretrocomputing.org/pdp10x/ ? ]

It's completely unrelated, except that the end result may be similar. I'm starting with the KL10-PV schematics and building Verilog from them (using a compilation technique). My Verilog builds the boards with exactly the same logic as the original, and I have modeled each of the ECL10k chips required in Verilog as well. I'm not "writing this from scratch" in the sense that when I'm done my implementation should be - unless there are transcription errors - precisely bug-for-bug compatible with the original in the schematics. I can run the same microcode, OSes, etc.

Of course, the compatibility problems will come from things like making the I/O devices work properly (which I have hardly started). Right now I'm writing Verilog code in my "test bench" to pretend to be the PDP11/40, shoving the microcode and dispatch-RAM content into the memories using the very same KL10 diagnostic operations the 11/40 used, and obtaining the microcode/D-RAM image from the very same KLX.RAM file the 11/40 RSX-20m used to do. I could do this by running (or writing) an 11/40 emulator and booting RSX-20m and creating a real DTE-20 bridge device to connect the emulated 11/40 to my KL10. I have considered this, since the 11/40 part of what I'm doing right now is annoyingly complicated to get right because of bit numbering, word size, byte sex, alignment, bit shuffling, and some pretty ugly PDP-11 code in the front end written by someone who had a talent for making something that should be very simple into something complex.

Fortunately for me I have @larsbrinkhoff's KLDCP code written by someone with actual PDP11 assembly language skill and talent for simplicity. I'm now moving a bit more quickly using that than I was looking at KLINIT.L20. Thanks, @larsbrinkhoff.

@alanmimms
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I just had an idea. I could run the PDP11/40 code in a simulator and watch it transform the KLX.RAM data into the EBUS diagnostic commands and record those output actions. I could then play back those actions and Bob would be, as they say, my uncle.

@alanmimms
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Does anyone know if there is a bootable RSX20F that can run in simh somehow?

@larsbrinkhoff
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This might be your best bet: "This directory contains images of the three RSX20F V16.00 install floppies. These are raw RX01 images"
http://ns1.dbit.com/pub/pdp10/kl10/rsx20f/

Also try to search through this: https://google.com/search?q=rsx20f&sitesearch=pdp-10.trailing-edge.com

@alanmimms
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alanmimms commented Sep 24, 2023 via email

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