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Disable I2C interface in ICM42688P sensor when it is initialized #22184

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merged 1 commit into from
Oct 17, 2023

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jlaitine
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@jlaitine jlaitine commented Oct 5, 2023

This prevents accidental misconfiguration via I2C if there are multiple SPI devices on the same bus. The device may hear it's i2c address and write some register, while there is data transfer ongoing with another device.

FIFO_COUNT_REC = Bit6,
FIFO_COUNT_ENDIAN = Bit5,
SENSOR_DATA_ENDIAN = Bit4,
UI_SIFS_CFG = Bit1 | Bit0,
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How about something like this? We need a better register abstraction...

Suggested change
UI_SIFS_CFG = Bit1 | Bit0,
UI_SIFS_CFG_DISABLE_I2C = Bit1 | Bit0,

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Sure!

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I also added the definitions to the copy of the file under boards/modalai/voxl2-slpi/src/drivers/icm42688p just in case. I am not sure how it is used, but I guess it doesn't harm at least, as it didn't exist before.

register_bank0_config_t _register_bank0_cfg[size_register_bank0_cfg] {
// Register | Set bits, Clear bits
{ Register::BANK_0::INTF_CONFIG0, INTF_CONFIG0_BIT::UI_SIFS_CFG, 0}, // 0x3 disable I2C
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Can you put this just before INTF_CONFIG1 (0x4D) to keep it in order?

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Yes, I intended it to be as early as possible, since it protects the bus. But it doesn't make much difference, it looks better like you suggested. Done

register_bank0_config_t _register_bank0_cfg[size_register_bank0_cfg] {
// Register | Set bits, Clear bits
{ Register::BANK_0::INTF_CONFIG0, INTF_CONFIG0_BIT::UI_SIFS_CFG, 0}, // 0x3 disable I2C
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The reset value of INTF_CONFIG0 is 0x30 which means FIFO_COUNT_ENDIAN and SENSOR_DATA_ENDIAN are also enabled by default.

Just for clarity can you either add them to the register config table or remove them from the INTF_CONFIG0_BITs? I know it's not quite there yet, but as much as possible I want to get to the point where our register config table is a declarative description of the entire register state (for the subset we care about).

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My original code just added the bits 0,1 , which disables the I2C, but didn't alter the default bits. I added the other two bits in here for clarity as you suggested.

@jlaitine jlaitine force-pushed the icm42688p_disable_i2c branch 2 times, most recently from d30f06f to 009a100 Compare October 6, 2023 06:12
This prevents accidental misconfiguration via I2C if there are
multiple SPI devices on the same bus. The device may hear it's i2c address
and write some register, while there is data transfer ongoing with another
device.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
@jlaitine
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@dagar, just checking if this was forgotten, or perhaps not needed in upstream px4? I believe I addressed the comments, so let's merge, modify further or close this PR 🙂

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dagar commented Oct 17, 2023

Looks good to me, but why is the voxl2-slpi version only partially updated? Hopefully that driver will be eliminated long term, but I think something must be missing in QuRT SPI support.

@dagar dagar merged commit e8a0a07 into PX4:main Oct 17, 2023
85 of 86 checks passed
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Looks good to me, but why is the voxl2-slpi version only partially updated? Hopefully that driver will be eliminated long term, but I think something must be missing in QuRT SPI support.

I didn't update the voxl2 driver as I wasn't sure whether the change was wanted there or not;. Also, I didn't have that hw at hand. It is of course simple to add if wanted.

@jlaitine jlaitine deleted the icm42688p_disable_i2c branch December 1, 2023 08:08
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2 participants