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SPU LLVM: fixup after #8175 (#8214)
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Mask out RESULT cmd bit, do not create unbound branch blocks. (non-TSX)
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elad335 committed May 14, 2020
1 parent 310f367 commit 91d06a9
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Showing 2 changed files with 16 additions and 14 deletions.
2 changes: 2 additions & 0 deletions rpcs3/Emu/Cell/PPUThread.cpp
Expand Up @@ -1087,7 +1087,9 @@ static T ppu_load_acquire_reservation(ppu_thread& ppu, u32 addr)
}
else
{
ppu.state += cpu_flag::wait;
std::this_thread::yield();
ppu.check_state();
}
}

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28 changes: 14 additions & 14 deletions rpcs3/Emu/Cell/SPURecompiler.cpp
Expand Up @@ -5774,20 +5774,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator

if (auto ci = llvm::dyn_cast<llvm::ConstantInt>(trunc<u8>(val).eval(m_ir)))
{
const auto eal = get_reg_fixed<u32>(s_reg_mfc_eal);
const auto lsa = get_reg_fixed<u32>(s_reg_mfc_lsa);
const auto tag = get_reg_fixed<u8>(s_reg_mfc_tag);

const auto size = get_reg_fixed<u16>(s_reg_mfc_size);
const auto mask = m_ir->CreateShl(m_ir->getInt32(1), zext<u32>(tag).eval(m_ir));
const auto exec = llvm::BasicBlock::Create(m_context, "", m_function);
const auto fail = llvm::BasicBlock::Create(m_context, "", m_function);
const auto next = llvm::BasicBlock::Create(m_context, "", m_function);

const auto pf = spu_ptr<u32>(&spu_thread::mfc_fence);
const auto pb = spu_ptr<u32>(&spu_thread::mfc_barrier);

if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK); !g_use_rtm)
if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_RESULT_MASK); !g_use_rtm)
{
// TODO: don't require TSX (current implementation is TSX-only)
if (cmdh == MFC_GET_CMD && g_cfg.core.spu_accurate_putlluc)
Expand All @@ -5801,6 +5788,19 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
}
}

const auto eal = get_reg_fixed<u32>(s_reg_mfc_eal);
const auto lsa = get_reg_fixed<u32>(s_reg_mfc_lsa);
const auto tag = get_reg_fixed<u8>(s_reg_mfc_tag);

const auto size = get_reg_fixed<u16>(s_reg_mfc_size);
const auto mask = m_ir->CreateShl(m_ir->getInt32(1), zext<u32>(tag).eval(m_ir));
const auto exec = llvm::BasicBlock::Create(m_context, "", m_function);
const auto fail = llvm::BasicBlock::Create(m_context, "", m_function);
const auto next = llvm::BasicBlock::Create(m_context, "", m_function);

const auto pf = spu_ptr<u32>(&spu_thread::mfc_fence);
const auto pb = spu_ptr<u32>(&spu_thread::mfc_barrier);

switch (u64 cmd = ci->getZExtValue())
{
case MFC_GETLLAR_CMD:
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