ssd.conf

# Copyright 2009, 2010 Brendan Tauras

# ssd.conf is part of FlashSim.

# FlashSim is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# any later version.

# FlashSim is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.

# You should have received a copy of the GNU General Public License
# along with FlashSim.  If not, see <http://www.gnu.org/licenses/>.

##############################################################################

# ssd.conf
# FlashSim configuration file
# default values in ssd_config.cpp as used if value is not set in config file

# Ram class:
#    delay to read from and write to the RAM for 1 page of data
RAM_READ_DELAY 0.01
RAM_WRITE_DELAY 0.01

# Bus class:
#    delay to communicate over bus
#    max number of connected devices allowed
#    number of time entries bus has to keep track of future schedule usage
#    number of simultaneous communication channels - defined by SSD_SIZE
BUS_CTRL_DELAY 2
BUS_DATA_DELAY 10
BUS_MAX_CONNECT 8
#BUS_TABLE_SIZE 512
#2015.10.14일에 table size 를 512 에서 4096 으로 늘려봄 
BUS_TABLE_SIZE 4096

# Ssd class:
#    number of Packages per Ssd (size)
SSD_SIZE 2

# Package class:
#    number of Dies per Package (size)
PACKAGE_SIZE 8

# Die class:
#    number of Planes per Die (size)
DIE_SIZE 4

# Plane class:
#    number of Blocks per Plane (size)
#    delay for reading from plane register
#    delay for writing to plane register
#    delay for merging is based on read, write, reg_read, reg_write
#       and does not need to be explicitly defined
PLANE_SIZE 1024
PLANE_REG_READ_DELAY 0.01
PLANE_REG_WRITE_DELAY 0.01

# Block class:
#    number of Pages per Block (size)
#    number of erases in lifetime of block
#    delay for erasing block
BLOCK_SIZE 1024
BLOCK_ERASES 100000
BLOCK_ERASE_DELAY 0.001


# Page class:
#    delay for Page reads
#    delay for Page writes
# -- A 64bit kernel is required if data pages are used. --
#	 Allocate actual data for pages
#    Size of pages (in bytes)
PAGE_READ_DELAY 0.000001;
PAGE_WRITE_DELAY 0.00001
PAGE_ENABLE_DATA 1

# MAPPING
# Specify reservation of
# blocks for mapping purposes.
MAP_DIRECTORY_SIZE 100

# FTL Implementation to use 0 = Page, 1 = BAST,
# 2 = FAST, 3 = DFTL, 4 = Bimodal
FTL_IMPLEMENTATION 1

# LOG Page limit for BAST
BAST_LOG_PAGE_LIMIT 1024

# LOG Page limit for FAST
FAST_LOG_PAGE_LIMIT 1024

# Number of pages allowed to be in DFTL Cached Mapping Table.
CACHE_DFTL_LIMIT 512

# 0 -> Normal behavior, 1 -> Striping, 2 -> Logical address space parallelism
PARALLELISM_MODE 2

# Written in round robin: Virtual block size (as a multiple of the physical block size)
VIRTUAL_BLOCK_SIZE 1

# Striping: Virtual page size (as a multiple of the physical page size)
VIRTUAL_PAGE_SIZE 1

# RAISSDs: Number of physical SSDs
RAID_NUMBER_OF_PHYSICAL_SSDS 8