Rename memory blocks to memory regions

_data/cheatsheets/linker_memory_blocks/STM32F0.json → _data/cheatsheets/linker_memory_regions/STM32F0.json

@@ -1,5 +1,5 @@
 {
-    "blocks": [
+    "regions": [
         "FLASH_BANK_1",
         "SRAM_1"
     ],

_data/cheatsheets/linker_memory_blocks/STM32F1.json → _data/cheatsheets/linker_memory_regions/STM32F1.json

@@ -1,5 +1,5 @@
 {
-    "blocks": [
+    "regions": [
         "FLASH_BANK_1",
         "FLASH_BANK_2",
         "SRAM_1",

_data/cheatsheets/linker_memory_blocks/STM32F2.json → _data/cheatsheets/linker_memory_regions/STM32F2.json

@@ -1,5 +1,5 @@
 {
-    "blocks": [
+    "regions": [
         "FLASH_BANK_1",
         "SRAM_1",
         "SRAM_2",

_data/cheatsheets/linker_memory_blocks/STM32F3.json → _data/cheatsheets/linker_memory_regions/STM32F3.json

@@ -1,5 +1,5 @@
 {
-    "blocks": [
+    "regions": [
         "FLASH_BANK_1",
         "SRAM_1",
         "CCM_SRAM",

_data/cheatsheets/linker_memory_blocks/STM32F4.json → _data/cheatsheets/linker_memory_regions/STM32F4.json

@@ -1,5 +1,5 @@
 {
-    "blocks": [
+    "regions": [
         "FLASH_BANK_1",
         "SRAM_1",
         "SRAM_2",

_data/cheatsheets/linker_memory_blocks/STM32F7.json → _data/cheatsheets/linker_memory_regions/STM32F7.json

@@ -1,5 +1,5 @@
 {
-    "blocks": [
+    "regions": [
         "FLASH_BANK_1",
         "FLASH_ITCM",
         "SRAM_1",

_includes/table-memory-blocks.html → _includes/table-memory-regions.html

@@ -1,22 +1,22 @@
 {% assign devices = include.data["devices"] | sort: "name" %}
-{% assign blocks = include.data["blocks"] %}
+{% assign regions = include.data["regions"] %}
 
-<div class="scrollable-table memory-blocks-table">
+<div class="scrollable-table memory-regions-table">
     <table>
         <thead>
             <tr>
                 <th>Device</th>
-                {% for block in blocks %}
-                <th>{{ block }}</th>
+                {% for region in regions %}
+                <th>{{ region }}</th>
                 {% endfor %}
             </tr>
         </thead>
         <tbody>
             {% for device in devices %}
             <tr>
                 <td>{{ device["name"] }}</td>
-                {% for block in blocks %}
-                {% assign memory = device["memory"][block] %}
+                {% for region in regions %}
+                {% assign memory = device["memory"][region] %}
                 {% if memory %}
                 <td>{% if memory["size"] %}{{ memory["size"] }} @ {% endif %}<code>{{ memory["origin"] }}</code></td>
                 {% else %}

_sass/cheatsheets.scss

@@ -23,7 +23,7 @@
     }
 }
 
-.memory-blocks-table {
+.memory-regions-table {
     td {
         text-align: right;
         min-width: 12rem;

cheatsheets/linker-memory-regions/STM32F0.md

@@ -0,0 +1,9 @@
+---
+title: "STM32F0 Memory regions"
+layout: "cheatsheet-table"
+back_location: "/cheatsheets/linker-memory-regions/"
+---
+
+# {{ page.title }}
+
+{% include table-memory-regions.html data=site.data.cheatsheets.linker_memory_regions.STM32F0 %}

cheatsheets/linker-memory-regions/STM32F1.md

@@ -0,0 +1,9 @@
+---
+title: "STM32F1 Memory regions"
+layout: "cheatsheet-table"
+back_location: "/cheatsheets/linker-memory-regions/"
+---
+
+# {{ page.title }}
+
+{% include table-memory-regions.html data=site.data.cheatsheets.linker_memory_regions.STM32F1 %}

cheatsheets/linker-memory-regions/STM32F2.md

@@ -0,0 +1,9 @@
+---
+title: "STM32F2 Memory regions"
+layout: "cheatsheet-table"
+back_location: "/cheatsheets/linker-memory-regions/"
+---
+
+# {{ page.title }}
+
+{% include table-memory-regions.html data=site.data.cheatsheets.linker_memory_regions.STM32F2 %}

cheatsheets/linker-memory-regions/STM32F3.md

@@ -0,0 +1,9 @@
+---
+title: "STM32F3 Memory regions"
+layout: "cheatsheet-table"
+back_location: "/cheatsheets/linker-memory-regions/"
+---
+
+# {{ page.title }}
+
+{% include table-memory-regions.html data=site.data.cheatsheets.linker_memory_regions.STM32F3 %}

cheatsheets/linker-memory-regions/STM32F4.md

@@ -0,0 +1,9 @@
+---
+title: "STM32F4 Memory regions"
+layout: "cheatsheet-table"
+back_location: "/cheatsheets/linker-memory-regions/"
+---
+
+# {{ page.title }}
+
+{% include table-memory-regions.html data=site.data.cheatsheets.linker_memory_regions.STM32F4 %}

cheatsheets/linker-memory-regions/STM32F7.md

@@ -0,0 +1,9 @@
+---
+title: "STM32F7 Memory regions"
+layout: "cheatsheet-table"
+back_location: "/cheatsheets/linker-memory-regions/"
+---
+
+# {{ page.title }}
+
+{% include table-memory-regions.html data=site.data.cheatsheets.linker_memory_regions.STM32F7 %}

cheatsheets/linker-memory-regions/index.md

@@ -0,0 +1,47 @@
+---
+title: "Linker: Memory regions"
+---
+
+# {{ page.title }}
+
+This cheatsheet page contains an overview of available memory regions for use in the project level linker scripts. regions having a size are already defined in the linker scripts provided by STM32-base.
+
+## STM32F0
+
+The `FLASH_BANK_1` and `SRAM_1` memory regions are available to all devices in the STM32F0 series. These devices to not support any other type of memory.
+
+[Show table for STM32F0]({{ site.url }}/cheatsheets/linker-memory-regions/STM32F0)
+
+## STM32F1
+
+The `FLASH_BANK_1` and `SRAM_1` memory regions are available to all devices in the STM32F1 series. The `FLASH_BANK_2` memory region is available for devices with more than 512KiB of flash memory. Some devices support external memory.
+
+[Show table for STM32F1]({{ site.url }}/cheatsheets/linker-memory-regions/STM32F1)
+
+## STM32F2
+
+The `FLASH_BANK_1`, `SRAM_1`, `SRAM_2`, and `BKP_SRAM` memory regions are available to all devices in the STM32F2 series. All devices support external memory.
+
+[Show table for STM32F2]({{ site.url }}/cheatsheets/linker-memory-regions/STM32F2)
+
+## STM32F3
+
+The `FLASH_BANK_1` and `SRAM_1` memory regions are available to all devices in the STM32F3 series. The `CCM_SRAM` memory region is available on some devices. Some devices support external memory.
+
+[Show table for STM32F3]({{ site.url }}/cheatsheets/linker-memory-regions/STM32F3)
+
+## STM32F4
+
+The `FLASH_BANK_1` and `SRAM_1` memory regions are available to all devices in the STM32F4 series. The `SRAM_2`, `SRAM_3`, `CCM_SRAM`, and `BKP_SRAM` memory regions are available for some devices in varying configurations. Some devices support external memory.
+
+The CCM SRAM available on STM32F4x3xx devices is available through the addresses defined for `SRAM_2` and `CCM_SRAM`. Use only one of those to load data into this part of SRAM.
+
+[Show table for STM32F4]({{ site.url }}/cheatsheets/linker-memory-regions/STM32F4)
+
+## STM32F7
+
+The `FLASH_BANK_1`, `FLASH_ITCM`, `SRAM_1`, `SRAM_2`, `DTCM_RAM`, `ITCM_RAM`, and `BKP_SRAM` memory regions are available to all devices in the STM32F7 series. All devices support external memory.
+
+Note that the flash memory cannot be written to via the `ICTM_FLASH` memory region.
+
+[Show table for STM32F7]({{ site.url }}/cheatsheets/linker-memory-regions/STM32F7)