Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Clock frequency #134

Closed
cansudemirkiran opened this issue Apr 4, 2022 · 3 comments
Closed

Clock frequency #134

cansudemirkiran opened this issue Apr 4, 2022 · 3 comments

Comments

@cansudemirkiran
Copy link

Hi,
I was wondering how we can relate to the maximum possible clock frequency/memory access latency we can operate the SRAM array using the timing values shown in the generated datasheet. I noticed that there is an event frequency value in the tech.py files which is set to 100 MHz. What does event frequency mean in this context? I tried changing the event frequency value and observed that the power numbers are scaled linearly but the timing values stayed the same. I'd greatly appreciate your explanation. Thanks!

@mguthaus
Copy link
Collaborator

mguthaus commented Apr 4, 2022 via email

@cansudemirkiran
Copy link
Author

Thank you for the quick response. Simply, I would like to obtain the information here in this slide, the right hand side plots.

Did you obtain these plots in the slides by using characterization? Do you have a documentation for the characterization option, how to use them instead of the default analytical models, etc.

For your question, the event frequency is defined in the tech files (example)

Thanks!

@mguthaus
Copy link
Collaborator

Hi,

We ran that manually using some bash scripts.

Matt

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants