Power estimation seems too high

[Lukemagik]

Describe the bug
I ran the sky130_sram_1rw_tiny example and the power report shows hundreds of watts, which seems wrong. Could this be a bug? How can I solve it?

Version
1.2.48

To Reproduce
cd OpenRAM/macros
make sky130_sram_1rw_tiny

[mguthaus]

It is a known issue that the power numbers have not been calibrated. The cell powers in the tech file are not correct.

[Lukemagik]

Hi, thank you for the response. Is it possible to obtain the power estimation in another way?

[mguthaus]

You can run a spice simulation.

These are the placeholder values for leakage:
https://github.com/VLSIDA/OpenRAM/blob/stable/technology%2Fsky130%2Ftech%2Ftech.py#L744

Similarly, there are estimates for capacitance used in dynamic power which might be set correctly.

[Lukemagik]

Thank you very much. With this approach, is it possible to obtain the .lib file as well? I would like to use these memories as macros in another design on OpenLane and I would like to have a complete power estimation.

[mguthaus]

It is, but it will be slow.

It'd be nice if someone can contribute new estimates for the tech file so they are correct instead.

[Lukemagik]

I didn't quite understand this last part.
In this case how was the power estimated on ? It seems to have more accurate values

[Lukemagik]

Sorry @mguthaus , in this issue it seems to me that you have the same problem as mine. I have a design on OpenLane that uses OpenRAM macros and I need to estimate the entire system power. However, to do this, it seems from this issue that a gate-level netlist is needed rather than the .lib file. Were you able to solve this problem?

[mguthaus]

There are no gate-level netlists of SRAM macros. It must use a .lib file.

[Lukemagik]

I understand, however, it seems that OpenLane is unable to read the .lib files of the macros to calculate power, and it only works when the gate-level netlist is present.

So my question is, based on this issue, how can we include the memory macro in power calculation when we only have the .lib file available?

[mguthaus]

This would be an openlane issue. Gate level doesn't exist for any memory macro even with other tools. It doesn't use the cells from the library.

Openlane should be using the .lib file for the memory macro to get the power.

[Lukemagik]

Perfect, so you're confirming that it's impossible for OpenLane to estimate the power of these memories since only the .lib file is available?

[mguthaus]

I'm confirming that openlane should only need the lib file to estimate power.

[Lukemagik]

So, did you manage to solve this issue?

[mguthaus]

The last comment in the thread says that I did not black box it for STA. I did need to convert the model parameters to constants to get it to work.

However, I don't recall if it estimated power correctly, but it did work with timing.

That issue is a year old, so I'm not sure what has changed in openlane regarding it. Again, this is an openlane issue.