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[JSC] Some misc cleanup in new BBQ #10433

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merged 1 commit into from
Feb 21, 2023
Merged

[JSC] Some misc cleanup in new BBQ #10433

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4 changes: 1 addition & 3 deletions Source/JavaScriptCore/assembler/AbstractMacroAssembler.h
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Original file line number Diff line number Diff line change
Expand Up @@ -426,9 +426,7 @@ class AbstractMacroAssembler : public AbstractMacroAssemblerBase {
friend class Watchpoint;

public:
Label()
{
}
Label() = default;

Label(AbstractMacroAssemblerType* masm)
: m_label(masm->m_assembler.label())
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12 changes: 12 additions & 0 deletions Source/JavaScriptCore/jit/FPRInfo.h
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Expand Up @@ -65,6 +65,12 @@ class FPRInfo {
// so we'll copy to xmm0 for sanity!
static constexpr FPRReg returnValueFPR = X86Registers::xmm0; // fpRegT0

#if CPU(X86_64)
static constexpr FPRReg nonPreservedNonArgumentFPR0 = X86Registers::xmm8;
#else
static constexpr FPRReg nonPreservedNonArgumentFPR0 = X86Registers::xmm5;
#endif

// FPRReg mapping is direct, the machine regsiter numbers can
// be used directly as indices into the FPR RegisterBank.
static_assert(X86Registers::xmm0 == 0);
Expand Down Expand Up @@ -135,6 +141,8 @@ class FPRInfo {
static constexpr FPRReg argumentFPR0 = ARMRegisters::d0; // fpRegT0
static constexpr FPRReg argumentFPR1 = ARMRegisters::d1; // fpRegT1

static constexpr FPRReg nonPreservedNonArgumentFPR0 = ARMRegisters::d7;

// FPRReg mapping is direct, the machine regsiter numbers can
// be used directly as indices into the FPR RegisterBank.
static_assert(ARMRegisters::d0 == 0);
Expand Down Expand Up @@ -223,6 +231,7 @@ class FPRInfo {
static constexpr FPRReg argumentFPR7 = ARM64Registers::q7; // fpRegT7

static constexpr FPRReg returnValueFPR = ARM64Registers::q0; // fpRegT0
static constexpr FPRReg nonPreservedNonArgumentFPR0 = ARM64Registers::q16;

static FPRReg toRegister(unsigned index)
{
Expand Down Expand Up @@ -288,6 +297,8 @@ class FPRInfo {
static constexpr FPRReg argumentFPR0 = MIPSRegisters::f12;
static constexpr FPRReg argumentFPR1 = MIPSRegisters::f14;

static constexpr FPRReg nonPreservedNonArgumentFPR0 = MIPSRegisters::f2;

static FPRReg toRegister(unsigned index)
{
static const FPRReg registerForIndex[numberOfRegisters] = {
Expand Down Expand Up @@ -382,6 +393,7 @@ class FPRInfo {
static constexpr FPRReg argumentFPR7 = RISCV64Registers::f17; // fpRegT7

static constexpr FPRReg returnValueFPR = RISCV64Registers::f10; // fpRegT0
static constexpr FPRReg nonPreservedNonArgumentFPR0 = RISCV64Registers::f11;

static FPRReg toRegister(unsigned index)
{
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