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unpacked array in ports #2717

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mehdimolum opened this issue Mar 30, 2021 · 3 comments
Open

unpacked array in ports #2717

mehdimolum opened this issue Mar 30, 2021 · 3 comments

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@mehdimolum
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Hi, I am wondering if there is any plan to support multi-dimensional arrays (packed/unpacked) in ports. yosys already supports multidimensional arrays within a module but how involved is it to extend the feature to ports as well?

@jgaztelu
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This would be much appreciated

@zachjs
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zachjs commented Jul 9, 2021

I believe the work to get this implemented might be significant. In the meantime, you may be interested in trying out https://github.com/zachjs/sv2v, which is already capable of handling these features.

@julian1
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julian1 commented Oct 26, 2023

Is there a workaround to this?
My use-case is a configurable register bank, where registers all the same length can be indexed, instead of defined on a per-register basis. But it needs inputs and outputs for the interface.

Edit.
Looks like the following may work, at least for input wires,

https://old.reddit.com/r/yosys/comments/44d7v6/arrays_as_inputs_to_modules/

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