Zachary Snow zachjs

Created 11 commits in 4 repositories

zachjs/sv2v 8 commits

chipsalliance/sv-tests 1 commit

lowRISC/ibex 1 commit

YosysHQ/yosys 1 commit

Created a pull request in chipsalliance/sv-tests that received 2 comments
Oct 11

Fix sv2v version logic

The logic here previously said it was dropping a trailing comma, but sv2v's version output doesn't have a trailing comma. On intermediate releases,…

+2 −5 • 2 comments

Opened 3 other pull requests in 2 repositories

YosysHQ/yosys 1 open 1 merged

sv: remove certain unnecessary loop var ending value assignments Oct 23

Specify minimum bison version 3.0+ Oct 1

lowRISC/ibex 1 merged

[syn] Use read_verilog -defer in yosys_run_synth.tcl Oct 6

Reviewed 2 pull requests in 1 repository

YosysHQ/yosys 2 pull requests

Remove unused wire in procedural for initialization Oct 14

Add support for the SystemVerilog bind keyword Oct 11

Created an issue in hdl/conda-eda that received 6 comments
Oct 3

Updating published sv2v

Firstly, thank you for all your work maintaining releases for HDL tools! I’m sure many appreciate the ease and simplicity this setup provides. I al…

6 comments

1 contribution in private repositories Oct 8

Zachary Snow zachjs

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October 2021

Created a pull request in chipsalliance/sv-tests that received 2 comments

Fix sv2v version logic

Created an issue in hdl/conda-eda that received 6 comments

Updating published sv2v