intel/common/brams_map_m9k.v widthad_* and width_* swapped

[rherveille]

Version

yosys 0.36+58

On which OS did this happen?

Linux

Reproduction Steps

Generated altsyncram instances have widthad_a/width_a and widthad_b/width_b parameter values swapped
Fixed by editing brams_map_m9k.v to:
.widthad_b ( CFG_ABITS ),
.width_b ( CFG_DBITS ),
.widthad_a ( CFG_ABITS ),
.width_a ( CFG_DBITS )

Tested and validated with experimental MAX10 flow.

Expected Behavior

.

Actual Behavior

.

[KrystalDelusion]

Is this fixed by #4262 ?

[rherveille]

It seems fixed for me. I checked the results and I can push the output verilog file (not vqm) through quartus. You can always try the updates on a fresh git clone. Richard On Mar 18, 2024, at 17:08, KrystalDelusion ***@***.***> wrote:  Is this fixed by #4262<#4262> ? — Reply to this email directly, view it on GitHub<#4251 (comment)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/ADYKSCMOGLGQ44Z36XRCCZTYY56XHAVCNFSM6AAAAABECUOCNSVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDAMBVGM4DMNJUHE>. You are receiving this because you authored the thread.Message ID: ***@***.***>