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Hey there, I've been running these releases on actual hardware (IIc+) since 1.2. I'm loving the direction things are going, but I have a small gripe with the 1.4 alpha, so I signed up. On a real IIc+, About This Apple reports the CPU as 65C02 (ZIP CHIP).
While I'm impressed at the ability of the code to correctly detect hardware markers, I'd argue that the IIc+ doesn't ACTUALLY contain a ZIP chip and shouldn't trigger this flag. Yeah, Apple licensed the technology from them and built the logic board around it, but there is no actual ZIP chip in a IIc+.
At best, I'd suggest something like 65C02 (4Mhz).
That's my two cents as a real-world IIc+ user. Please continue and carry on developing this awesome product!
The text was updated successfully, but these errors were encountered:
Thanks for the suggestion. I now just skip the test on the IIc+ since that's easy. I don't report the 4MHz, but it should show up that way in the "Benchmark" DA.
(I wonder what happens if you put an 8MHz ZIP in a IIc+?)
Hey there, I've been running these releases on actual hardware (IIc+) since 1.2. I'm loving the direction things are going, but I have a small gripe with the 1.4 alpha, so I signed up. On a real IIc+, About This Apple reports the CPU as 65C02 (ZIP CHIP).
While I'm impressed at the ability of the code to correctly detect hardware markers, I'd argue that the IIc+ doesn't ACTUALLY contain a ZIP chip and shouldn't trigger this flag. Yeah, Apple licensed the technology from them and built the logic board around it, but there is no actual ZIP chip in a IIc+.
At best, I'd suggest something like 65C02 (4Mhz).
That's my two cents as a real-world IIc+ user. Please continue and carry on developing this awesome product!
The text was updated successfully, but these errors were encountered: