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Tsukasa OI edited this page Oct 1, 2022 · 4 revisions

RISC-V: Implement extension variants

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Feature Description

While investigating the possible implementation of Zdinx, Zqinx and 'P' subextensions, I found another thing that is common.

This patchset implements what I call: extension variants. It was formerly a part of Zfinx fixes (formerly the flag was named INSN_F_OR_X).

If there is a instruction with multiple variants with different requirements and the assembler fails to parse all variants, there is a case that needs to refer all variants to generate proper diagnostics.

If an instruction with INSN_HAS_EXT_VARS fails on all variants, the assembler now has a chance to modify the instruction class for proper diagnostics. A typical use of this feature is to select wider instruction class when necessary.

Usage 1: Zbpbo: CLZ instruction

To implement proposed Zbpbo extension, updating instruction class for CLZ instruction is not enough. If we change CLZ instruction class from INSN_CLASS_ZBB to INSN_CLASS_ZBB_OR_ZBPBO, we will mistakenly support that instruction on RV64_Zbpbo because CLZ on Zbpbo is RV32-only.

Possible use with INSN_HAS_EXT_VARS is to define two variants of CLZ instruction with that flag:

  1. Zbb (RV32/RV64)
  2. Zbpbo (RV32)

If both fails, we can widen the instruction class from INSN_CLASS_ZBPBO to INSN_CLASS_ZBB_OR_ZBPBO if XLEN is 32. After doing that, we will get following diagnostics:

  • On RV32: Zbb or Zbpbo is required
  • On RV64: Zbb is required

Usage 2: D / Zdinx or Q / Zqinx

Due to use of register pairs, we need to split {D,Q} and Z{d,q}inx variants. For instance, if parsing fmin.d fails on both D and Zdinx variants, we have to require D or Zdinx, not just Zdinx, the last fmin.d variant in riscv_opcodes.

  1. D
  2. Zdinx

If both fails, if we widen the instruction class from INSN_CLASS_ZDINX to INSN_CLASS_D_OR_ZDINX, we will get diagnostics saying D or Zdinx is required.

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