SAMD21 Clock Config

[richbourne]

In the crystalless clock config section of the system_init() funtion in init_samd21.c there is this line (setting up OSC8M on GCLK_gen 2):

GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(2) | GCLK_GENCTRL_SRC_OSC8M_Val | GCLK_GENCTRL_GENEN;

Why is GCLK_GENCTRL_SRC_OSC8M_Val used? I would've expected his value to be bit-shifted into place using the GCLK_GENCTRL_SRC_OSC8M define.

Thanks

[dhalbert]

Hmm, that does seem wrong, and it's an accident that's it's working now, perhaps. If you fix this, does the bootloader still work?

[richbourne]

It does appear to function correctly after the change, yes. Boots OK...can flash circuitpython with a .uf2 update file.

[dhalbert]

A PR would be welcome, if you feel so inclined.

[xyzzy42]

This was fixed in #188 and can be closed.

[dhalbert]

Thanks!