Quicklogic Quickfeather integration

[kowalewskijan]

The PR introduces two general changes:

• Fixing the nomenclature of the toolchain according to the latest SymbiFlow QuickLogic toolchain package
• Adding a possibility to utilize internal SoC clock

Related PR: amaranth-lang/amaranth-boards#117

[codecov]

Codecov Report

Merging #518 into master will increase coverage by 0.04%.
The diff coverage is n/a.

@@            Coverage Diff             @@
##           master     #518      +/-   ##
==========================================
+ Coverage   81.33%   81.38%   +0.04%     
==========================================
  Files          49       49              
  Lines        6409     6414       +5     
  Branches     1278     1282       +4     
==========================================
+ Hits         5213     5220       +7     
+ Misses       1007     1006       -1     
+ Partials      189      188       -1     

Impacted Files	Coverage Δ
nmigen/back/verilog.py	50.00% <0.00%> (-1.52%)	⬇️
nmigen/build/dsl.py	96.17% <0.00%> (-0.10%)	⬇️
nmigen/back/rtlil.py	81.42% <0.00%> (ø)
nmigen/lib/cdc.py	90.69% <0.00%> (+0.45%)	⬆️
nmigen/lib/fifo.py	93.93% <0.00%> (+0.53%)	⬆️
nmigen/sim/_pyrtl.py	95.80% <0.00%> (+0.64%)	⬆️

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[whitequark]

Thanks!