CR "ADDRESS_BITS" - dont understand why SW needs to know this value

[amichai-bd]

| 0| ADDRESS_BITS| RO | Number of bits required to address entities| MEMORY_OFFSET_BITS[7:0] |

The way I see it - the SW just needs the CR addresses from the Hardware-Software-interface Spec.
Why would SW care how many HW bits are used for the CR "address decode match"?
As long as the Register offset not overflow the 8bit CR offset it should be just fine.
@DL8 - Am i missing something?

[DL8]

This information is relevant for D_MEM and I_MEM, not CR space: the number of memory offset bits tells software the memory size (D_MEM and I_MEM separately). Some advantages for having this knowledge:

1. Portability (no need to recompile for units with different memory size)
2. Better memory utilization (you can partition D_MEM more efficiently if you know how much you have)

I'll clarify it in the documentation.

Assumptions behind this definition:

1. D_MEM and I_MEM are of the same size. If that's not the case, we'll need to indicate them in separate fields
2. D_MEM and I_MEM size is a power-of-2. If that's not the case, we'll need to re-think this definition (or add another CR for size?)