In this reposotoiry, you'll find a detailed implmenetation of multicycle processor using Verilog.
First of all, project's link.
The report of our implementation, here.
The implementation can be found here
The testing of all instructions, here.
For generating boolean expressions, I used these two python codes for reading the truth tables written in .csv files and extract the indcies of ones and don't care terms to be used later for writing the equations.
Also, I wrote a python code, main.py, for assembling any assembly code, for example, to be used in Verilog.
Otherwise, all .csv files attached, are the truth tables which I used with the codes above.
You can find online websites for generating the boolean equations, I found this website very useful.
How to run the Verilog code
In the project files here, open datapath_tb_runtest.do file, then click on "Execute script".