cn0415: initial commit

The EVAL-CN0415-ARDZ is a robust pulse-width modulation (PWM) solenoid driver circuit in an Arduino shield form factor. https://wiki.analog.com/resources/eval/user-guides/eval-adicup3029/hardware/cn0415 This application uses the board with the EVAL-ADICUP3029 to implement a PID controller designed to follow a current target in the lead or a % duty cycle of the PWM. It has dither capabilities and over-voltage and over-current protections. This commit adds the CCES project files and the main and configuration files of the project. More details on the application at: https://wiki.analog.com/resources/eval/user-guides/eval-adicup3029/reference_designs/demo_cn0415 Signed-off-by: Andrei Drimbarean <Andrei.Drimbarean@analog.com>
analogdevicesinc · Feb 27, 2019 · 77d8d94 · 77d8d94
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diff --git a/.astyleignore b/.astyleignore
@@ -0,0 +1,4 @@
+# CCES generated files
+/RTE/
+/Debug/
+/system/
diff --git a/projects/ADuCM3029_demo_cn0415/.cproject b/projects/ADuCM3029_demo_cn0415/.cproject
diff --git a/projects/ADuCM3029_demo_cn0415/.gitignore b/projects/ADuCM3029_demo_cn0415/.gitignore
@@ -0,0 +1,2 @@
+/Debug/
+/Release/
diff --git a/projects/ADuCM3029_demo_cn0415/.project b/projects/ADuCM3029_demo_cn0415/.project
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>ADuCM3029_demo_cn0415</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>com.analog.crosscore.managedbuilder.core.cleanbuilder</name>
+			<triggers>clean,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+		<nature>com.analog.crosscore.managedbuilder.core.CCESProjectNature</nature>
+		<nature>com.arm.cmsis.pack.project.RteNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_dma.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/dma/adi_dma.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_flash.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/flash/adi_flash.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_gpio.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/gpio/adi_gpio.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_pwr.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/pwr/adi_pwr.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_spi.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/spi/adi_spi.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_tmr.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/tmr/adi_tmr.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_uart.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/uart/adi_uart.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/adi_wdt.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/drivers/wdt/adi_wdt.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ADuCM3029/common.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/AnalogDevices/ADuCM302x_DFP/3.2.0/Source/common.c</locationURI>
+		</link>
+	</linkedResources>
+	<variableList>
+		<variable>
+			<name>CCES</name>
+			<value>file:/C:/Analog%20Devices/CrossCore%20Embedded%20Studio%202.8.0</value>
+		</variable>
+	</variableList>
+</projectDescription>
diff --git a/projects/ADuCM3029_demo_cn0415/.settings/DefaultProjectAttribute.prefs b/projects/ADuCM3029_demo_cn0415/.settings/DefaultProjectAttribute.prefs
@@ -0,0 +1,7 @@
+ArtifactType=org.eclipse.cdt.build.core.buildArtefactType.exe
+CoreId=0
+Processor=ADuCM3029
+Revision=1.0
+adi_initialize.c.lastgenerated=1521707594609
+adi_initialize.h.lastgenerated=1521707595053
+eclipse.preferences.version=1
diff --git a/projects/ADuCM3029_demo_cn0415/.settings/ToolChain.prefs b/projects/ADuCM3029_demo_cn0415/.settings/ToolChain.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+version=2.8.0.0
diff --git a/projects/ADuCM3029_demo_cn0415/.settings/components.json b/projects/ADuCM3029_demo_cn0415/.settings/components.json
@@ -0,0 +1 @@
+{"components":{"com.analog.crosscore.ssldd.pinmux.component":{"componentId":"com.analog.crosscore.ssldd.pinmux.component","createDate":"1521707486212","resourceList":[]},"com.analog.crosscore.addins.ssldd.pwr.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.pwr.cortexm3","createDate":"1521707593855","resourceList":[]},"com.analog.crosscore.addins.ssldd.spi.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.spi.cortexm3","createDate":"1521707593901","resourceList":[]},"com.analog.crosscore.addins.ssldd.uart.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.uart.cortexm3","createDate":"1521707593948","resourceList":[]},"com.analog.crosscore.addins.ssldd.int.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.int.cortexm3","createDate":"1521707593985","resourceList":[]},"com.analog.crosscore.addins.ssldd.gpio.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.gpio.cortexm3","createDate":"1521707594024","resourceList":[]},"com.analog.crosscore.addins.cmsis.cortexm.startup":{"componentId":"com.analog.crosscore.addins.cmsis.cortexm.startup","createDate":"1521707594062","resourceList":[]},"com.analog.crosscore.addins.ssldd.drivers.config_headers.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.drivers.config_headers.cortexm3","createDate":"1521707594084","resourceList":[]},"com.analog.crosscore.addins.ssldd.dma.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.dma.cortexm3","createDate":"1521707594116","resourceList":[]},"com.analog.crosscore.addins.cmsis.core.cortexm":{"componentId":"com.analog.crosscore.addins.cmsis.core.cortexm","createDate":"1521707594150","resourceList":[]},"com.analog.crosscore.addins.ssldd.services.config_headers.cortexm3":{"componentId":"com.analog.crosscore.addins.ssldd.services.config_headers.cortexm3","createDate":"1521707594174","resourceList":[]}}}
diff --git a/projects/ADuCM3029_demo_cn0415/RTE/Device/ADuCM3029/ADuCM3029.ld b/projects/ADuCM3029_demo_cn0415/RTE/Device/ADuCM3029/ADuCM3029.ld
@@ -0,0 +1,217 @@
+/* 
+ * Portions Copyright (c) 2016 Analog Devices, Inc.
+ *
+ * Based on Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld file in
+ * ARM.CMSIS.4.5.0.pack.
+ */
+
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  /* The first 0x180 bytes of Flash bank0 */
+  FLASH0 (rx) : ORIGIN = 0x00000000, LENGTH = 0x180
+  /* The remaining bytes of Flash bank0 */
+  FLASH (rx) : ORIGIN = 0x00000180, LENGTH = 256k - 0x180
+  /* SRAM bank 0+1 */
+  DSRAM_A (rwx) : ORIGIN = 0x20000000, LENGTH = 16k
+  /* SRAM bank 3 */
+  DSRAM_B (rwx) : ORIGIN = 0x20040000, LENGTH = 16k
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values.
+ * It references the following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines the following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.vectors :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+	} > FLASH0
+
+	.security_options :
+	{
+		. = ALIGN(4);
+		KEEP(*(.security_options))
+		. = ALIGN(4);
+	} > FLASH
+
+	.text :
+	{
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > DSRAM_B
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > DSRAM_B
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > DSRAM_A
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > DSRAM_A
+
+	/* Set stack top to end of DSRAM_A, and move stack limit down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(DSRAM_A) + LENGTH(DSRAM_A);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds DSRAM_A limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region DSRAM_A overflowed with stack")
+}