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Simulation error for Skylake (python exception) #14

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amonakov opened this issue May 12, 2022 · 2 comments
Closed

Simulation error for Skylake (python exception) #14

amonakov opened this issue May 12, 2022 · 2 comments

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@amonakov
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amonakov commented May 12, 2022

I was exploring variants of a loop and found one where uiCA.py throws an exception even though nothing out of the ordinary seems to happen in the loop.

Short link to uica.uops.info: https://bit.ly/3Pga31D

For reference, the loop on the above link that shows the issue on Skylake..Cascade Lake:

loop:
vmovaps ymm0, [rsi]
vmovaps ymm1, [rsi+32]
vorps ymm0, ymm0, [rsi+64]
vorps ymm1, ymm1, [rsi+96]
vorps ymm1, ymm1, [rsi+128]
vorps ymm1, ymm1, [rsi+160]
vorps ymm0, ymm0, [rsi+192]
vmovaps xmm2, [rsi+224]
vpor xmm2, xmm2, [rsi+240]
add rsi, 256

vorps ymm0, ymm0, ymm1
vextractf128 xmm1, ymm0, 1
vpor xmm0, xmm0, xmm1
vpor xmm0, xmm0, xmm2
vpcmpeqb xmm0, xmm0, xmm7
vpmovmskb eax, xmm0
test eax, eax
jz out
dec ecx
jnz loop
out:

Exception trace:

Traceback (most recent call last):
  File "/uiCA/uiCA.py", line 2448, in <module>
    main()
  File "/uiCA/uiCA.py", line 2441, in main
    TP = runSimulation(disas, uArchConfig, int(args.alignmentOffset), args.initPolicy, args.noMicroFusion, args.noMacroFusion, args.simpleFrontEnd,
  File "/uiCA/uiCA.py", line 2294, in runSimulation
    frontEnd.cycle(clock)
  File "/uiCA/uiCA.py", line 572, in cycle
    newInstrIUops = self.DSB.cycle()
  File "/uiCA/uiCA.py", line 743, in cycle
    DSBBlock = self.DSBBlockQueue[0]
IndexError: deque index out of range

Thank you so much for uiCA!

@andreas-abel
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This is now fixed. However, note that uiCA is only intended to analyze basic blocks. Your example is not a basic block due to the additional jump; thus, the analysis results might not be very meaningful.

@amonakov
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Thanks. I'm interested in situations when that jump is not taken (if taken, it just terminates the loop early), and it looks like uiCA does what I want.

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